1. Technical Field
Embodiments of the invention relate to thermal sensors. More particularly, embodiments of the invention relate to design, manufacture and use of Micro Electro Mechanical (MEMS) thermal sensors in an interconnect layer of an integrated circuit.
2. Background Art
Thermal sensing on integrated circuits has previously relied upon nano-meter size, transistor based thermal sensors which operate according to a voltage reference. For example, current thermal sensors in processor cores include a bipolar transistor using a bandgap reference to detect temperature, where the voltage across a junction will change with temperature.
However, these thermal sensor techniques rely upon analog transistors which, due to their size, are very sensitive to manufacturing process variations. Such sensitivity impacts the sensor accuracy and linearity. Thermal sensor accuracy and linearity are critical to operations of a processor core, for example, since they can lead to power loss platform noise, reliability degradation and platform performance loss.
Due to continuing process scaling, process variations have an increasingly severe affect on the accuracy of thermal sensing transistors which rely upon a bandgap voltage reference. In addition, a critical thermal limit for operation of an integrated circuit is often in the interconnect layer and not in the transistor layer.
The various embodiments of the present invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
In the following description, numerous specific details are set forth. However, embodiments of the invention may be practiced without these specific details. In other instances, well-known circuits, structures and techniques have not been shown in detail in order not to obscure the understanding of this description.
Increased thermal sensing may be used to support improved system performance. However, in order to achieve wide acceptance, the costs of increased thermal sensing must be within an acceptable range. Described herein is a resonator structure that may provide an inexpensive, accurate thermal sensing solution that can support increased thermal sensing applications.
In one embodiment, a Micro-Electro-Mechanical Systems (MEMS) resonator is to monitor temperature of an interconnect layer of an integrated circuit (IC). Sensor readout and control circuits can be on silicon if desired, for example, a positive feedback amplifier to form an oscillator in conjunction with the resonator and a counter to count oscillator frequency. In one embodiment, a thermal sensor that takes advantage of the low deposition temperature of copper—e.g. by patterning a copper resonator structure in an IC's interconnect layer—may be utilized. Further, use of copper as the resonator structural material may increase the thermal dependence of the resonator frequency on temperature and hence improve the overall sensor accuracy. In one embodiment, the resonator may be connected in a positive feedback topology with a transimpedance amplifier that can be formed on silicon to provide an oscillator. The output of the oscillator is a signal with a frequency that is dependent on the resonator temperature and the frequency is counted with a simple counter circuit that can also be implemented on silicon.
Electronic system 100 may have any number of thermal sensors, which may include resonator structures and/or thermal diodes. The example of
Electronic system 100 includes bus 105 or other communication device to communicate information, and processor 110 coupled to bus 105 that may process information. While electronic system 100 is illustrated with a single processor, electronic system 100 may include multiple processors and/or co-processors. Electronic system 100 further may include random access memory (RAM) or other dynamic storage device (included in memory 120), coupled to bus 105 and may store information and instructions that may be executed by processor 110. Memory 120 may also be used to store temporary variables or other intermediate information during execution of instructions by processor 110. Memory 120 may also include read only memory (ROM) and/or other static storage device that may store static information and instructions for processor 110.
Electronic system 100 may include thermal management system 130 that may provide thermal monitoring and/or cooling functionality. Thermal management system 130 may include one or more fans and/or one or more liquid cooling mechanisms to cool various components of electronic system 100. Further, thermal management system 130 may include monitoring circuitry to monitor the temperature of various component and areas in electronic system 100. Data storage device 140 may be coupled to bus 105 to store information and instructions. Data storage device 140 such as a magnetic disk or optical disc and corresponding drive may be coupled to electronic system 100.
Electronic system 100 may also be coupled via bus 105 to display device 150, such as a cathode ray tube (CRT) or liquid crystal display (LCD), to display information to a user. Alphanumeric input device 160, including alphanumeric and other keys, may be coupled to bus 105 to communicate information and command selections to processor 110. Another type of user input device is cursor control 170, such as a mouse, a trackball, or cursor direction keys to communicate direction information and command selections to processor 110 and to control cursor movement on display 150.
Electronic system 100 further may include network interface(s) 180 to provide access to a network, such as a local area network. Network interface(s) 180 may include, for example, a wireless network interface having antenna 185, which may represent one or more antenna(e). Network interface(s) 180 may also include, for example, a wired network interface to communicate with remote devices via network cable 187, which may be, for example, an Ethernet cable, a coaxial cable, a fiber optic cable, a serial cable, or a parallel cable.
In one embodiment, network interface(s) 180 may provide access to a local area network, for example, by conforming to IEEE 802.11b and/or IEEE 802.11g standards, and/or the wireless network interface may provide access to a personal area network, for example, by conforming to Bluetooth standards. Other wireless network interfaces and/or protocols can also be supported.
IEEE 802.11b corresponds to IEEE Std. 802.11b-1999 entitled “Local and Metropolitan Area Networks, Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: Higher-Speed Physical Layer Extension in the 2.4 GHz Band,” approved Sep. 16, 1999 as well as related documents. IEEE 802.11g corresponds to IEEE Std. 802.11g-2003 entitled “Local and Metropolitan Area Networks, Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications, Amendment 4: Further Higher Rate Extension in the 2.4 GHz Band,” approved Jun. 27, 2003 as well as related documents. Bluetooth protocols are described in “Specification of the Bluetooth System: Core, Version 1.1,” published Feb. 22, 2001 by the Bluetooth Special Interest Group, Inc. Associated as well as previous or subsequent versions of the Bluetooth standard may also be supported.
In addition to, or instead of, communication via wireless LAN standards, network interface(s) 180 may provide wireless communications using, for example, Time Division, Multiple Access (TDMA) protocols, Global System for Mobile Communications (GSM) protocols, Code Division, Multiple Access (CDMA) protocols, and/or any other type of wireless communications protocol.
where keff is the effective stiffness of the resonator material, meff is the effective mass of the resonator material, E is Young's Modulus and ρ is the density of the resonator material. Thus, as the capacitance, C(t), changes with flexure of the resonator structure, the voltage, Vin(t), applied to the resonator structure results in a proportional change in output current, Io(t).
The first dielectric layer and the second dielectric (or barrier metal) layer may be selected to achieve selectivity between a dielectric layer and another dielectric (or barrier metal) layer, the selectivity to achieve structures such as those represented in
The one or more component layers of interconnect layer 400 may position therein one or more interconnect structures, represented in
For manufacturing of a MEMS resonator structure, a photoresist layer 423 may be deposited on a top dielectric layer—here a layer of second dielectric 410. A channel may then be created—e.g. by lithography—which extends through the photoresist layer 423 and into various component layers of interconnect layer 400. In an embodiment, a bottom 426 of the channel may be separated from the electrode 420 by dielectric material which will allow for a capacitive gap. The capacitive gap may provide for free vibration of the resonator, as discussed below.
Layer 430 may include a sacrificial layer of titanium or other suitable metal. The depositing of layer 433 on top of layer 430 may include first depositing a seed layer (not shown) of the second metal—e.g. of copper—over layer 430, followed by electroplating more of the second metal on the seed layer.
An additional sacrificial layer 443 of the first metal is deposited on a top surface of the interconnect layer 400. A block 446 of sacrificial light absorbing material (SLAM) is deposited on the sacrificial layer 443 above the resonator structure 440, and a block 449 of photoresist is deposited over the block 446. Blocks 446 and 449 are in preparation for partial removal of sacrificial layer 443.
The resonator structure 440—e.g. a resonator beam—is surrounded by a gap region 470 which allows the resonator structure 440 to resonate within its channel above electrode 420. The resonator structure 440 may be partially supported, restrained or otherwise positioned by other structures of the interconnect layer 400. For example, portions of layer 453 may be in contact with resonator structure 440 at respective ends thereof. Additionally or alternatively, output electrodes 480 may extend though nitride seal 475 and come into contact with resonator structure 440 at respective ends thereof. The output electrodes 480 may further provide for converting a resonance of the resonating structure 480 into a thermal detection signal—e.g. by thermal detection circuitry (not shown). It is understood that circuitry to convert a resonance signal into a thermal detection signal is well known in the art, and may vary according to different implementation.
Techniques and architectures for thermal sensing in an integrated circuit are described herein. In the description herein, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be apparent, however, to one skilled in the art that the invention can be practiced without these specific details. In other instances, structures and devices are shown in block diagram form in order to avoid obscuring the description.
Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.
Some portions of the detailed descriptions which follow are presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the computing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of steps leading to a desired result. The steps are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.
It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the following discussion, it is appreciated that throughout the description, discussions utilizing terms such as “processing” or “computing” or “calculating” or “determining” or “displaying” or the like, refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission or display devices.
The present invention also relates to apparatus for performing the operations herein. This apparatus may be specially constructed for the required purposes, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but is not limited to, any type of disk including floppy disks, optical disks, CD-ROMs, and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs) such as dynamic RAM (DRAM), EPROMs, EEPROMs, magnetic or optical cards, or any type of media suitable for storing electronic instructions, and each coupled to a computer system bus.
The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method steps. The required structure for a variety of these systems will appear from the description below. In addition, the present invention is not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the invention as described herein.
Besides what is described herein, various modifications may be made to the disclosed embodiments and implementations of the invention without departing from their scope. Therefore, the illustrations and examples herein should be construed in an illustrative, and not a restrictive sense. The scope of the invention should be measured solely by reference to the claims that follow.
Number | Name | Date | Kind |
---|---|---|---|
4437773 | Dinger et al. | Mar 1984 | A |
4448546 | Paros | May 1984 | A |
4459042 | Paros | Jul 1984 | A |
4986670 | Uchiyama et al. | Jan 1991 | A |
5506497 | Klein et al. | Apr 1996 | A |
5772322 | Burns et al. | Jun 1998 | A |
6985051 | Nguyen et al. | Jan 2006 | B2 |
7427905 | Lutz et al. | Sep 2008 | B2 |
7541004 | Niksa et al. | Jun 2009 | B2 |
7924109 | Ogasawara | Apr 2011 | B2 |
8258893 | Quevy et al. | Sep 2012 | B2 |
20030051550 | Nguyen et al. | Mar 2003 | A1 |
20040016989 | Ma et al. | Jan 2004 | A1 |
20040207492 | Nguyen et al. | Oct 2004 | A1 |
20070108383 | Combes et al. | May 2007 | A1 |
20070247245 | Hagelin | Oct 2007 | A1 |
20080144695 | Hamada | Jun 2008 | A1 |
20080262773 | Howell | Oct 2008 | A1 |
20090085191 | Najafi et al. | Apr 2009 | A1 |
20090108381 | Buchwalter et al. | Apr 2009 | A1 |
20090276990 | Horie et al. | Nov 2009 | A1 |
20100032268 | Suilleabhain et al. | Feb 2010 | A1 |
20100032789 | Schoen et al. | Feb 2010 | A1 |
20100088865 | Ashour | Apr 2010 | A1 |
20110000280 | Whalen et al. | Jan 2011 | A1 |
20110150030 | Abdelmoneum et al. | Jun 2011 | A1 |
20120056281 | Mohanakrishnaswamy et al. | Mar 2012 | A1 |
20120229220 | Quevy et al. | Sep 2012 | A1 |
20120280594 | Chen et al. | Nov 2012 | A1 |
20130285171 | Najafi et al. | Oct 2013 | A1 |
Number | Date | Country |
---|---|---|
2098852 | Sep 2009 | EP |
01145539 | Jun 1989 | JP |
2009097951 | May 2009 | JP |
2009178778 | Aug 2009 | JP |
200943501 | Oct 2009 | TW |
Entry |
---|
“PCT International Search Report and Written Opinion of the International Searching Authority for PCT Patent Application No. PCT/US2010/058356”, (Aug. 31, 2011), Whole Document. |
Huang, et al., “Fully Monolithic CMOS Nickel Micromechanical Resonator Oscillator, IEEE MEMS 2008.”, (2008), pp. 10-13. |
Huang, et al., “Nickel Vibrating Micromechanical Disk Resonator with Solid Dielectric Capacitive-Transducer Gap, 2006 IEEE FCS.”, (2006), pp. 839-847. |
Jha, et al., “CMOS-Compatible Dual-Resonator Temperature Sensor With Milli-Degree Accuracy, 2007 IEEE Sensors & Actuator.”, (2007), pp. 229-232. |
Koskenvouri, et al., “Temperature Measurement and Compensation Based on Two Vibrating Modes of a Bulk Acoustic Mode Microresonator, IEEE MEMS 2008,”, (2008), pp. 78-81. |
Teva, et al., “From VHF to UHF CMOS-MEMS Monolithically Integrated Resonators, IEEE MEMS 2008 .”, (2008), pp. 82-85. |
“Office Action for Chinese patent Application No. 201010609237.1”, (Apr. 27, 2013), Whole Document. |
“Office Action and Search Report for Taiwan Patent Application No. 99140390”, (May 3, 2013), Whole Document. |
“Office Action for Japanese Patent Application No. 2012-545983”, (Oct. 2, 2013), Whole Document. |
“Office Action for Korean Patent Application No. 10-2012-7016968”, (Feb. 25, 2014), Whole Document. |
Number | Date | Country | |
---|---|---|---|
20110150031 A1 | Jun 2011 | US |