The present disclosure relates to a thermistor drive circuit that drives a thermistor by applying a power supply current to the thermistor.
When the temperature is detected by a thermistor, a driving resistor having a low temperature characteristic is connected in series to the thermistor to obtain an output which is obtained by dividing a power supply voltage. Generally, the thermistor has a poor linearity in a terminal across voltage, because the terminal across voltage changes exponentially according to the temperature being detected, and a range of the output voltage is widened.
The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description made with reference to the accompanying drawings, in which:
For example, there have been known a technique of switching a driving resistor according to the temperature so as to improve the linearity or a technique of employing a configuration of limiting the range of the output voltage. In the technique of switching the driving resistor, however, since the amount of the power supply current is changed in accordance with the switching of the driving resistor, the power supply voltage is likely to be largely fluctuated with the change in the amount of the power supply current.
According to an aspect of the present disclosure, a thermistor drive circuit includes: a plurality of driving resistors configured to be selectively connected to a thermistor for correcting a temperature characteristic of the thermistor whose resistance value changes in accordance with a temperature to be detected; at least one current correction resistor configured to be selectively connected between a power supply and a ground; a voltage measurement unit configured to measure a terminal voltage of the thermistor; and a controller configured to switch connection states of the plurality of driving resistors according to the terminal voltage, and to switch a connection state of the at least one current correction resistor when switching the connection states of the plurality of driving resistors to suppress a fluctuation of a power supply current before and after the switching of the connection states of the plurality of driving resistors.
In the above configuration, when the controller switches the connection states of the driving resistors according to the terminal voltage of the thermistor, the controller also switches the connection state of the current correction resistor, so that the fluctuation in power supply current before and after the switching of the connection state of the driving resistors is suppressed. As such, the fluctuation of the power supply voltage can be suppressed.
For example, when the controller switches the connection states of the driving resistors to increase a resistance value, the controller may switch the connection state of the current correction resistor so as to reduce a resistance value.
Various embodiments of the present disclosure will be hereinafter described with reference to the drawings.
As shown in
The terminal Vin of the thermistor TH is connected to an input terminal of a voltage measurement unit 3. The voltage measurement unit 3 is, for example, an A/D converter, a sample-hold circuit, or the like. The voltage measurement unit 3 measures a terminal voltage of the thermistor TH, and outputs the measured terminal voltage to a control unit 4 as a controller and to an external device. The control unit 4 is provided by, for example, a microcomputer or hardware logic. The control unit 4 controls a connection state of each switch of the linearity correction unit 1 and the current correction unit 2 according to voltage data received from the voltage measurement unit 3.
Next, an operation of the present embodiment will be described. As shown in
In the low temperature zone LT, only the switch SWL is closed to connect the resistor R1_LT to the thermistor TH. In the intermediate temperature zone RT, only the switch SWR is closed to connect the resistor R1_RT to the thermistor TH. In the high temperature zone HT, only the switch SWH is closed to connect the resistor R1_HT to the thermistor TH.
When the resistors R1_LT, R1_RT, and R1_HT of the linearity correction unit 1 are switched in this way, as indicated by a broken line in
As shown in
These operations are similarly performed when the detected temperature shifts from the low temperature zone LT toward the high temperature zone HT. Thus, the fluctuation of the power supply current before and after the switching from the LT mode to the RT mode and the switching from the RT mode to the HT mode is suppressed. That is, the opening and closing of the switch SWL_C is performed in the switching between the RT mode and the LT mode, and the opening and closing of the switch SWR_C is performed in the switching between the HT mode and the RT mode. Even if the connection states of the resistors Rd1 and Rd2 of the current correction unit 2 are switched in this manner, the terminal voltage of the thermistor TH is not particularly affected, as shown in
According to the present embodiment, as described above, it is configured that the current correction resistors Rd1 and Rd2 are selectively connected between the power supply and the ground. Further, when switching the connection states of the driving resistors R1_LT, R1_RT, and R1_HT so as to increase the resistance value according to the terminal voltage of the thermistor TH, the control unit 4 switches also the connection states of the current correction resistors Rd1 and Rd2 so as to reduce the resistance value, thereby suppressing the fluctuation of the power supply current before and after the switching of the plural driving resistors. As such, the fluctuation of the power supply voltage can also be suppressed.
Hereinafter, the same parts as those in the first embodiment will be designated with the same reference numerals and descriptions thereof will be omitted. The following description will focus on different parts.
As shown in
The parallel resistance values of the resistors R1_H1 to R1_H3, R1_R1 to R1_R3, and R1L1 to R1_L3 are, respectively, set equal to the resistance values of the resistors R1_HT, R1_RT, and R1_LT of the first embodiment.
Corresponding to the configuration of the linearity correction unit 11, the current correction unit 12 also has three sets of series circuits each having a switch and a resistor, to be used at the time of switching the mode between the HT mode and the RT mode and between the RT mode and the LT mode.
Namely, the switches SWR1_C to SWR3_C and the resistors Rd4 to Rd6 are provided for the switching between the HT mode and the RT mode; and the switches SWL1_C to SWL3 _C and resistors Rd1 to Rd3 are provided for the switching between the RT mode and the LT mode.
The parallel resistance values of the resistors Rd4 to Rd6 and the resistors Rd1 to Rd3 are respectively set equal to the resistance values of the resistors Rd2 and Rd1 of the first embodiment. The control unit 13 controls the switches of the linearity correction unit 11 and the current correction unit 12.
Next, operations of the second embodiment will be described. As shown in
Similarly, when shifting from the RT mode to the LT mode, the control unit 13 sequentially opens the closed switches SWR1, SWR2, and SWR3 as well as sequentially closes the switches SWL1, SWL2, and SWL3 corresponding to the timing of sequentially opening the switches SWR1, SWR2, and SWR3. In addition, the control unit 13 sequentially closes the switches SWL1_C, SWL2_C, and SWL3_C corresponding to the timings of sequentially closing the switches SWL1, SWL2, and SWL3.
As described above, according to the second embodiment, the control unit 13 switches the connection states of the current correction resistors stepwise, when switching the measurement mode between the HT, RT, and LT modes. Accordingly, the fluctuation of the power supply current when shifting the measurement modes is further reduced, and the fluctuation of the power supply voltage is thus further suppressed.
As shown in
The voltage measuring unit 22 constitutes a sample and hold circuit as shown in
Here, the significance of providing the level shifting resistors R2 (R2_LT, R2_RT and R2_HT) in the third embodiment will be described. When the temperature detected by the thermistor TH rises to a high temperature, the resistance value decreases and the current consumption increases. If the resistance values of the driving resistors R1 (R1_LT, R1_RT, R2_HT) are increased so as to suppress the increase in current consumption, the input voltage Vin approaches the ground level.
A non-inverted input terminal of an operational amplifier constituting the sample and hold circuit is applied with a reference voltage Vref. However, when the input voltage Vin approaches the ground level, the potential difference with the reference voltage Vref increases. As a result, a leak current flows from the non-inverted input terminal toward an inverted input terminal of the operational amplifier. In the third embodiment, since the level shift resistors R2_LT, R2_RT and RT_HT are inserted, the potential difference between the input voltage Vin and the reference voltage Vref at a high temperature can be reduced, and thus the occurrence of the leakage current can be restricted. In general, the switches are provided by MOSFETs or the like. Therefore, by performing the level shift, the threshold can be controlled by means of a substrate bias effect, and thus the leak current can be restricted. The measurement control is performed by a control unit 23.
As described above, according to the third embodiment, the level shifting resistors R2_LT, R2_RT, and R2_HT respectively connected in series to the drive resistors R1_LT, R1_RT, and R1_HT are provided. The voltage measurement unit 22 measures the voltages at the common connection points of the drive resistors R1_LT, R1_RT, and R1_HT and the level shift resistors R2_LT, R2_RT, and R2_HT. In such a configuration, the potentials at the common connection points are level-shifted by the level shifting resistors R2_LT, R2_RT and R2_HT. As a result, the potential differences between the potentials at the common connection points and the reference voltage Vref of the sample and hold circuit is reduced. Therefore, the leak current inside the sample and hold circuit can be reduced, and thus the deterioration of accuracy of the input signal can be suppressed.
As shown in
According to the fourth embodiment configured as described above, a leak current similar to that of the third embodiment may occur depending on the potential differences of the input terminals of the multiplexer 32. In such a case, an off leak current may occur when the switch for input selection is in an off state. In the fourth embodiment, since the configuration similar to the third embodiment is employed, the potential difference between the input terminals can be reduced to reduce the off leak current.
It is not always necessary to divide the temperature range into three zones. The temperature range may be divided into two, four, or more zones.
The present disclosure may be applicable to a thermistor having a terminal connected to a power supply.
The present disclosure may be applicable to a thermistor having a positive temperature characteristic.
While the present disclosure has been described with reference to embodiments thereof, it is to be understood that the disclosure is not limited to the embodiments and constructions. The present disclosure is intended to cover various modification and equivalent arrangements. In addition, while the various combinations and configurations, other combinations and configurations, including more, less or only a single element, are also within the spirit and scope of the present disclosure.
Number | Date | Country | Kind |
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2016-218944 | Nov 2016 | JP | national |
The present application is a continuation application of International Patent Application No. PCT/JP2017/030925 filed on Aug. 29, 2017, which designated the U.S. and claims the benefit of priority from Japanese Patent Application No. 2016-218944 filed on Nov. 9, 2016. The entire disclosures of all of the above applications are incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/JP2017/030925 | Aug 2017 | US |
Child | 16387649 | US |