Claims
- 1. A method of manufacturing a thin film transistor, comprising the steps of:
- forming a gate electrode on a semiconductor substrate with a first insulating layer interposed therebetween;
- forming a gate insulating film on said gate electrode;
- forming a semiconductor layer on said gate insulating film and said first insulating layer;
- forming a second insulating layer on said semiconductor layer except for a part corresponding to a channel region in said semiconductor layer; and
- thermally oxidizing the exposed surface of said semiconductor layer using said second insulating layer as a mask to reduce the thickness of the semiconductor layer in said channel region.
- 2. The method of manufacturing a thin film transistor according to claim 1, further comprising the steps of:
- forming a resist pattern in a predetermined region on said thermally oxidized film; and
- ion-implanting impurities into parts corresponding to source/drain regions in said semiconductor layer using said resist pattern as a mask.
- 3. The method of manufacturing a thin film transistor according to claim 1, wherein said step of forming a second insulation layer includes forming a silicon nitride film.
- 4. A method of manufacturing a thin film transistor, comprising the steps of:
- forming a first semiconductor layer extending across a source region, a channel region, and a drain region of a thin film transistor;
- forming a second semiconductor layer extending across the source region and drain region of the thin film transistor except for the channel region; and
- forming a gate electrode opposite the channel region in said first semiconductor layer with a gate insulating film interposed therebetween.
- 5. A method of manufacturing a thin film transistor, comprising the steps of:
- forming a semiconductor layer of polycrystalline silicon constituting a source region, a channel region, and a drain region of a thin film transistor; and
- introducing hydrogen combining with silicon in the vicinity of the grain boundary of said polycrystalline silicon, including the steps of
- forming an oxide film insulating layer on said semiconductor layer by a plasma CVD process and introducing hydrogen from the outside into the vicinity of the grain boundary of said polycrystalline silicon to form a combination of silicon and hydrogen.
Priority Claims (2)
Number |
Date |
Country |
Kind |
3-242087 |
Sep 1991 |
JPX |
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4-14007 |
Jan 1992 |
JPX |
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Parent Case Info
This application is a division of application Ser. No. 07/942,492, filed Sep. 9, 1992, now U.S. Pat. No. 5,281,828.
US Referenced Citations (12)
Foreign Referenced Citations (11)
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Non-Patent Literature Citations (1)
Entry |
Denshi Joho Tsushin Gakkai Gijyutsu Kenkyu Hokoku, vol. 89, No. 67, pp. 1-6, 1989 IEEE Electronic Device Letters, vol. EDL-4, No. 8, pp. 272-274, 1983. |
Divisions (1)
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Number |
Date |
Country |
Parent |
942492 |
Sep 1992 |
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