1. Field of the Invention
The present invention generally relates to a thin package structure, and more specifically to a thin package structure with enhanced strength provided by a support carrier plate, which is formed with a plurality of openings to facilitate testing.
2. The Prior Arts
Please refer to
The first solder mask 41 is formed on the lower surface of the dielectric layer 20, and covers the first circuit patterns 21 and part of the first connection pads 23. The second solder mask 43 is formed on the upper surface of the dielectric layer 20, and covers the second circuit patterns 31 and part of the second connection pads 33.
However, it is still needed to perform additional processes, such as treatment, testing. Since the thickness of the thin package structure 100 is less than 300 μm, it is easy to warp or deform during the processes of treatment, test, or transportation between different treatments and/or tests. As a result, the conveyer carrying the thin package structure 100 is possibly stuck and fails, or the circuit is loosen and drops to cause serious damage to the final products. Therefore, it is greatly needed to provide a new package structure with enhanced strength to overcome the drawbacks in the prior arts.
The primary objective of the present invention is to provide a thin package structure with enhanced strength. The thin package structure of the present invention includes a support carrier plate and a thin circuit board. The thin circuit board is formed on the support carrier plate and at least includes a first circuit layer, a dielectric layer and a second circuit layer. The first circuit layer is formed on an upper surface of the support carrier plate and includes a plurality of first circuit patterns and a plurality of first connection pads. The first circuit patterns and the first connection pads are connected to each other. The dielectric layer is formed on the upper surface of the support carrier plate to cover the first circuit layer and has a plurality of holes. The second circuit layer is formed on or embedded in an upper surface of the dielectric layer and includes a plurality of second circuit patterns and a plurality of second connection pads. The second circuit patterns and the second connection pads are connected to each other. A plurality of connection plugs are formed in the holes of the dielectric layer, and each connection plug is connected to the corresponding first and second connection pads.
A plurality of openings are formed on the support carrier plate, and each opening corresponds to the first connection pad. The support carrier plate provides mechanical strength to avoid warping or deforming in the processes of manufacturing, test and transportation. Furthermore, because of the openings provided on the support carrier plate, it is feasible to direct test the package structure without disassembling so as to improve the convenience in testing.
The present invention can be understood in more detail by reading the subsequent detailed description in conjunction with the examples and references made to the accompanying drawings, wherein:
The present invention may be embodied in various forms and the details of the preferred embodiments of the present invention will be described in the subsequent content with reference to the accompanying drawings. The drawings (not to scale) show and depict only the preferred embodiments of the invention and shall not be considered as limitations to the scope of the present invention. Modifications of the shape of the present invention shall too be considered to be within the spirit of the present invention.
The thin circuit board 10 has a thickness less than 300 um. A solder mask 40 is formed on the upper surface of the dielectric layer 25, and covers the second circuit patterns 31 and part of the second connection pads 33. A plurality of openings 55 are formed on the support carrier plate 50, each opening 55 corresponding to the first connection pad 23. Moreover, an electroplating seed layer 60 is formed between the upper surface of the support carrier plate 50 and the first circuit layer 20. A surface treatment layer 65 is formed on the upper surface of the first connection pads 23 exposed to the openings 55, and the second connection pads 33 not covered by the solder mask 40.
Additionally,
Additionally, in other stacked structures 70, the lower surface of the second dielectric layer 75 is connected to the upper surface of another dielectric layer 75. The third connection pads 83 in the upper stacked structure 70 are connected to the third connection pads of lower adjacent stacked structure 70 via the second connection pads 77. In an uppermost stacked structure 70, a solder mask 40 is provided on the upper surface of the second dielectric layer 75, and covers the third circuit patterns 81 and part of the third connection pads 83. Furthermore, the surface treatment layer 65 is formed on the third connection pads 83, which is not covered by the solder mask 40.
One feature of the present invention is that the support carrier plate 50 provides mechanical strength to prevent the thin circuit board 10 from warping or deforming in the processes of manufacturing, test and transportation. Meanwhile the openings 55 are provided on the support carrier plate 50 so as to enable to direct test without disassembling. Therefore, the convenience in testing is greatly improved.
Although the present invention has been described with reference to the preferred embodiments, it will be understood that the invention is not limited to the details described thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.