The present disclosure relates to a time measuring device, a time measuring method, and a distance measuring device.
As a method for measuring a distance to an object, a Time of Flight (ToF) sensor (distance measuring device) is known. For example, in a case where the ToF sensor is an indirect TOF sensor, the ToF sensor irradiates an object with irradiation light having a predetermined cycle, and detects a phase difference between the irradiation light and reflected light reflected from the object, so that the distance to the object can be measured. Although improvement in distance measurement accuracy is required for such a distance measuring device, there is a limit to improvement in distance measurement accuracy of the distance measuring device.
Therefore, in order to improve the distance measurement accuracy, it is conceivable to measure a time error (for example, a time difference or the like generated between control signals) generated in the distance measuring device by the time measuring device and to correct the distance measuring device on the basis of the measurement result. For example, as a time measuring device that measures such a minute time, a device disclosed in Patent Document 1 below can be exemplified.
Patent Document 1: Japanese Patent Application Laid-Open No. 05-150056
Patent Document 2: Japanese Patent Application Laid-Open No. 2011-254246
However, in the time measuring device disclosed in Patent Document 1 described above, since the resolution of the measurement time is limited, there is a limit in improving the distance measurement accuracy of the distance measuring device even in a case where correction is performed on the distance measuring device using the time measuring device.
Therefore, the present disclosure proposes a time measuring device and a time measuring method having further improved time resolution, and a distance measuring device using the same.
According to the present disclosure, there is provided a time measuring device including: a first counter unit that acquires a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal; a delay signal generation unit that generates a delay signal by delaying the first measured signal on the basis of the first measurement result fed back from the first counter unit; a measurement unit that measures a difference time between the delay signal and the second measured signal as a second measurement result; and an operation unit that performs an operation by using the first measurement result and the second measurement result.
Furthermore, according to the present disclosure, there is provided a time measuring method including: acquiring a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal; generating a delay signal by delaying the first measured signal on the basis of the first measurement result that has been fed back; measuring a difference time between the delay signal and the second measured signal as a second measurement result; and performing an operation by using the first measurement result and the second measurement result.
Moreover, according to the present disclosure, there is provided a distance measuring device that is a ToF distance measuring device including a time measuring device, the time measuring device including: a first counter unit that acquires a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal; a delay signal generation unit that generates a delay signal by delaying the first measured signal on the basis of the first measurement result fed back from the first counter unit; a measurement unit that measures a difference time between the delay signal and the second measured signal as a second measurement result; and an operation unit that performs an operation by using the first measurement result and the second measurement result.
Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that, in the present specification and the drawings, the same reference numerals are given to the constituent elements having substantially the same functional configuration, and redundant explanations are omitted.
Furthermore, in this specification and the drawings, a plurality of constituent elements having substantially the same or similar functional configuration may be distinguished by attaching different numerals after the same reference numerals. However, in a case where it is not necessary to particularly distinguish each of a plurality of constituent elements having substantially the same or similar functional configuration, only the same reference numerals are attached. Furthermore, similar constituent elements of different embodiments may be distinguished by adding different alphabets after the same reference numerals. However, in a case where it is not necessary to particularly distinguish each of similar constituent elements, only the same reference numerals are attached.
In the following description, a substantially rectangular shape is not limited to a geometrically perfect rectangular shape, and includes a shape in which corners of the rectangular shape are somewhat rounded (curved) to an allowable extent in the operation of the time measuring device and a shape similar to the shape.
Furthermore, in the following description, “connection” means electrically connecting a plurality of elements, unless otherwise noted in the description of the circuit configuration. Moreover, “connection” in the following description includes not only a case of directly and electrically connecting a plurality of elements but also a case of indirectly and electrically connecting via other elements.
Note that the description will be given in the following order.
1. Overview of distance measuring device 1
2. Principle of distance calculation method using distance measuring device 1
3. Background to creation of embodiments according to the present disclosure by the present inventors
4. First embodiment
4.1 Overview
4.2 Delay signal generation unit 208
4.3 Time measuring method
5. Second embodiment
5.1 Configuration example of TDC 200
5.2 Configuration example of TAC 500
5.3 Configuration example of TAC 500
5.4 Modification
6. Third embodiment
7. Fourth embodiment
8. Conclusion
9. Supplement
First, a schematic configuration of a distance measuring device 1 according to an embodiment of the present disclosure will be described with reference to
(Irradiation Unit 20)
The irradiation unit 20 includes a laser light source (not illustrated). The wavelength of the emitted light can be changed by appropriately selecting the light source. Note that, in the present embodiment, the description will be given assuming that the irradiation unit 20 emits infrared light having a wavelength in a range of 780 nm to 1000 nm, for example, but in the present embodiment, the irradiation unit 20 is not limited to a configuration of emitting such infrared light. Furthermore, the irradiation unit 20 can irradiate an object 800 with irradiation light whose brightness in a cyclic manner varies in synchronization with a signal (drive pulse) supplied from the control unit 40 as described later.
(Light Receiving Unit 30)
The light receiving unit 30 receives the reflected light reflected from the object 800. The light receiving unit 30 includes a condenser lens (not illustrated) and a plurality of light receiving elements (pixels) (not illustrated) as described later. The condenser lens has a function of collecting received light to each light receiving element 10. Furthermore, the light receiving element generates a charge (for example, an electron) on the basis of the intensity of the received light, converts the generated charge into a signal in synchronization with a signal (drive pulse) supplied from the control unit 40 as described later, and transfers the signal to the processing unit 60.
(Control Unit 40)
The control unit 40 supplies a cyclic signal (drive pulse) to the irradiation unit 20 and the light receiving unit 30, and controls the irradiation timing of the irradiation light and the drive timing of the light receiving unit 30.
(Processing Unit 60)
The processing unit 60 can acquire the signal from the light receiving unit 30 and acquire the distance to the object 800 by, for example, an indirect ToF (iToF) method on the basis of the acquired signal. Note that a method of calculating the distance will be described later.
Next, a principle of a distance calculation method (indirect type) using the distance measuring device 1 according to the embodiment of the present disclosure will be described with reference to
As illustrated in
Therefore, in the light receiving unit 30 according to the present embodiment, for example, a drive signal (specifically, a drive pulse) is imparted to the two elements A and B (for example, a light receiving element or a memory element) provided for each pixel unit, the drive signal differentially driving (driving in different periods) the two elements A and B. For example, it is assumed that a drive signal imparted to the element A is illustrated in the third row from the top in
Moreover, as illustrated in
Next, before describing the details of the embodiments according to the present disclosure, a background in which the present inventors have created the embodiments according to the present disclosure will be described with reference to
In the distance measuring device 1, as described above, the control unit 40 supplies a cyclic signal (drive pulse) to the irradiation unit 20 and the light receiving unit 30 (specifically, the element A and the element B), and controls the irradiation timing of the irradiation light and the drive timing of the light receiving unit 30. For example, as illustrated in
As described above, the distance measuring device 1 is required to further improve the distance measurement accuracy. However, according to the study of the present inventors, there is a limit to improvement of distance measurement accuracy due to the presence of an error as described below. Specifically, due to a variation in voltage of the control unit 40, a power supply (not illustrated), or the like, or a variation in device temperature, for example, as illustrated in
Then, in view of such a situation, the present inventors have uniquely conceived of suppressing the occurrence of a distance measurement error, that is, improving the distance measurement accuracy by detecting the phase error θ described above and performing correction using the detected phase error θ. Then, for this purpose, a time to digital converter (TDC) that measures the phase error θ described above with high accuracy, in other words, with high resolution (for example, 10 ps or less) is required. More specifically, if the correction can be performed by such a phase error θ measured by the high-resolution TDC, the distance measurement error can be suppressed to several mm or less, for example.
Therefore, the present inventors have conducted intensive studies on the high-resolution TDC. Here, with reference to
The TDC is a measurement target of a difference between a rise time or a fall time of a signal (start) that arrives early and a signal (stop) that arrives late, which are signals of a wave that is substantially rectangular (substantially rectangular wave) or signals (toggle signals) that repeats a substantially rectangular wave in a cyclic manner. As illustrated in
Moreover, the reading accuracy of the voltage Veq by the ADC 106 is determined by the effective bit depth N of the ADC 106 as can be seen from the following Equation (2). Note that, in the following Equation (2), Vmax−Vmin means a variation range of the voltage Veq input to the ADC 106.
Accordingly, according to the Equations (1) and (2), the pulse width Tvp, that is, the measurement accuracy of the time to be measured can be expressed by the following Equation (3).
Accordingly, the measurement accuracy of the time to be measured of the TDC is reduced by reducing the variation range Vmax−Vmin of the voltage (Veq) input to the ADC 106. Furthermore, the measurement accuracy of the time to be measured by the TDC is also reduced by increasing the effective bit depth N.
Furthermore, the Equation (3) can be converted into the following Equation (4).
That is, as can be seen from Equation (4), the measurement accuracy of the time to be measured of the TDC can also be reduced by reducing the pulse width Tvp of the measured pulse Vp output from the pulse generator 102 and increasing the effective bit depth N. In other words, the time resolution of the TDC can be improved by reducing the pulse width Tvp of the measured pulse Vp output from the pulse generator 102 and increasing the effective bit depth N. Note that the maximum value of the pulse width Tvp of the measured pulse Vp is the maximum value of the difference between the rise time or the fall time of the signal (start) that arrives early and the signal that arrives late (stop), and is the measurement range of the TDC.
However, in order to improve the time resolution of the TDC, it is conceivable to increase the effective bit depth N of the ADC 106. However, in a case where the TDC is to be manufactured by a miniaturization process in which a low operating voltage is required, there is a limit to increasing the effective bit depth N of the ADC 106. Furthermore, in order to improve the time resolution of the TDC, it is conceivable to reduce the maximum value of the difference between the rise time or the fall time of the signal (start) that arrives early and the signal (stop) that arrives late. However, this means narrowing the measurement range of the TDC, and thus it cannot be said to be a preferable solution. That is, it can be said that it is difficult to improve the time resolution of the TDC without narrowing the measurement range of the TDC since these are in a trade-off relationship.
Therefore, as one means for improving the time resolution without narrowing the measurement range of the TDC, for example, the technology disclosed in Patent Document 1 described above can be mentioned. Patent Document 1 discloses a technology of coarsely measuring (counting) an entire measurement range of a TDC in a clock cycle by a counter, and measuring a part of the measurement range described above with a resolution equal to or less than the clock cycle by a TV conversion circuit. Note that, in the following description, the technology disclosed in Patent Document 1 described above is referred to as a comparative example.
The comparative example will be described below with reference to
As a result, in the comparative example, since the measurement range of the TDC and the width of the pulse signal input to the TV conversion circuit can be separated, the width of the pulse signal input to the TV conversion circuit can be narrowed without narrowing the measurement range of the TDC. Then, in the comparative example, since the pulse signal width input to the TV conversion circuit can be narrowed, the time resolution is improved. Accordingly, according to the comparative example, the time resolution of the TDC can be improved without narrowing the measurement range of the TDC.
However, according to the study of the present inventors, in the comparative example, since the difference between the measured signal and the digital clock signal may be the integration of the clock cycle and the width equal to or less than the clock cycle as illustrated in
That is, since the TDC according to the comparative example has a limit in improving the time resolution, there is a limit in improving the distance measurement accuracy even if the distance measuring device 1 is corrected using the TDC. Therefore, the present inventors have intensively studied to obtain the TDC with further improved temporal resolution. As a result, the present inventors have created the TDC according to the embodiment of the present disclosure capable of improving the time resolution of the TDC without narrowing the measurement range of the TDC. Details of such embodiments according to the present disclosure will be sequentially described below.
First, an overview of a first embodiment of the present disclosure will be described with reference to
In the first embodiment of the present disclosure created by the present inventors, as illustrated in
Specifically, as illustrated in
(Pulse Generator 202)
The pulse generator 202 includes a logic circuit, and in step S100 described above, a difference between rise times or fall times (a difference time between the first measured signal and the second measured signal) of the measured signals VT1 and VT2 (first measured signal, second measured signal) (see
Furthermore, in step S101 described above, the pulse generator 202 converts a difference in rise time or fall time between the delay signal VT1D (see
(Coarse Measurement Unit 204)
The Coarse measurement unit 204 includes a counter circuit (logic circuit), and can count the number of clocks of the reference clock signal CLK (see
(Delay Evaluation Unit 206)
The delay evaluation unit 206 determines a delay amount (RG value) using the count result of the Coarse measurement unit 204, and feeds back the delay amount to the delay signal generation unit 208 as described later. In the present embodiment, the delay amount (RG value) is set to increase in proportion to the width of the measured pulse VT2−T1 (see
(Delay Signal Generation Unit 208)
The delay signal generation unit 208 generates a delay signal VT1D (see
Then, the delay signal generation unit 208 may include, for example, a plurality of flip-flop circuits (not illustrated) arranged in a line and evenly on a semiconductor substrate (not illustrated). Alternatively, the delay signal generation unit 208 may include, for example, a plurality of latch circuits (not illustrated) arranged in a line and evenly on a semiconductor substrate (not illustrated). Moreover, the plurality of flip-flop circuits or latch circuits may be electrically connected to, for example, wiring branched in a tournament form from the reference clock signal source 420 (for example, including a phase locked loop (PLL) or the like) (see
(Fine Measurement Unit 210)
The fine measurement unit 210 can be configured by, for example, the TV conversion circuit 100 including the ADC 106 as illustrated in
Then, as described above, the delay signal VT1D is generated by delaying the measured signal VT1 by a numerical value obtained by multiplying the delay amount (RG value) proportional to the width of the measured pulse VT2−T1 by the reference clock cycle TCLK. Then, the difference VFN to be measured by the fine measurement unit 210 is a difference between the VT1D and the measured signal VT2 generated in this manner, and thus has a width equal to or less than the reference clock cycle TCLK. Accordingly, since the measurement range of the fine measurement unit 210 which is the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock cycle TCLK, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.
(Operation Unit 212)
The operation unit 212 includes a logic circuit, a memory, and the like, and uses the count result (first measurement result) of the Coarse measurement unit 204 and the measurement result (second measurement result) of the fine measurement unit 210 described above to perform an operation of the difference between the rise time and the fall time of the two measured signals VT1 and VT2 (first measured signal, second measured signal) (see
Note that, in the present embodiment, the components included in the TDC 200 are not limited to the components illustrated in
Details of the time measuring method performed by the TDC 200 according to the present embodiment will be described with reference to
First, in the present embodiment, the pulse generator 202 converts the difference between the rise time or the fall time of the two measured signals VT1 and VT2 into a measured pulse VT2−T1 illustrated in the third row from the top in
Moreover, in the present embodiment, the delay evaluation unit 206 determines a delay amount (RG value) using the count result of the Coarse measurement unit 204, and feeds back the delay amount to the delay signal generation unit 208. For example, the delay evaluation unit 206 determines the delay amount (RG value) on the basis of the count result with reference to the following Equation (5).
[Math. 5]
RG=CNT−(Np+1) (5)
Note that, in Equation (5), the CNT indicates the count result in the Coarse measurement unit 204, that is, the number of counts obtained by counting the digital timing signal VCS in the clock cycle (TCLK). Furthermore, an arbitrary integer can be used as the constant Np, and for example, in the example illustrated in
Then, the delay signal generation unit 208 generates a delay signal VT1D illustrated in the fifth row from the top in
Next, the fine measurement unit 210 measures the difference VFN output from the pulse generator 202 with high resolution, and outputs a measurement result to the operation unit 212 (step S101). That is, in the present embodiment, the fine measurement unit 210 measures the difference VFN between the delay signal VT1D and the above-described measured signal VT2 instead of measuring the difference (input pulse signal) between the measured signal and the digital clock signal as in the comparative example. As described above, the delay signal VT1D is generated by delaying the measured signal VT1 by a numerical value obtained by multiplying the delay amount (RG value) proportional to the width of the measured pulse VT2−T1 by the reference clock cycle TCLK Then, the difference VFN to be measured by the fine measurement unit 210 is a difference between the VT1D and the measured signal VT2 generated in this manner, and thus has a width equal to or less than the reference clock cycle TCLK Accordingly, since the measurement range of the fine measurement unit 210 which is the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock cycle TCLK, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.
The operation unit 212 performs an operation of a difference between rise times or fall times of the two measured signals VT1 and VT2 by using the count result of the Coarse measurement unit 204 and the measurement result of the fine measurement unit 210 (step S103). Note that, in the example of
In Equation (6), TMEAS is a difference between rise times or fall times of the two measured signals VT1 and VT2 to be measured, TCS is a time width of the digital timing signal VCS illustrated in the fourth row from the top in
Here, a measurement target of the TDC 200 according to the present embodiment in the distance measuring device 1 will be specifically described with reference to
As illustrated in
For example, in the present embodiment, by measuring the difference between the rise time or the fall time of the measured signal VT2 and the measured signal VT1 by the TDC 200, the above-described phase error θ (delay time) can be detected. Moreover, in the present embodiment, the phase difference (delay time) of the signal between the terminals 312 and 322 can be detected by performing an operation of the difference between the detected phase errors θ (delay times). Then, in the present embodiment, by performing correction using the phase error θ and the phase difference (delay time) detected by the high-resolution TDC 200, the distance measurement accuracy of the distance measuring device 1 can be improved. The detailed configuration of the TDC 200 and the time measuring method according to the present embodiment will be sequentially described in detail below.
As described above, the TDC 200 according to the present embodiment includes the delay signal generation unit 208. Therefore, a detailed configuration of the delay signal generation unit 208 will be described with reference to
First, an outline of an example of the delay signal generation unit 208 according to the present embodiment will be described with reference to
Then, as described above, in order to make the output load uniform, the generator 410 may include, for example, a plurality of flip-flop circuits (not illustrated) arranged in a line and evenly on a semiconductor substrate (not illustrated). Alternatively, as similar to the above, the generator 410 may include, for example, a plurality of latch circuits (not illustrated) arranged in a line and evenly on a semiconductor substrate (not illustrated). Note that a detailed configuration of the generator 410 will be described later.
Moreover, the generator 410 is electrically connected to the reference clock signal source 420. Specifically, the reference clock signal CLK is supplied to a plurality of flip-flop circuits or latch circuits included in the generator 410 by wiring branched in a tournament form from the reference clock signal source 420 such that the reference clock signal CLK is uniformly supplied without variation in delay time.
For example, the generator 410 may include a plurality of D-type flip-flop circuits connected in series as illustrated in
Furthermore, as illustrated in
Furthermore, for example, as illustrated in
Furthermore, for example, as illustrated in
Next, details of the time measuring method of the TDC 200 according to the present embodiment will be described with reference to
First, in the present embodiment, the TDC 200 is activated, and the signal supply is repeated a predetermined number of times until the voltage of the signal (drive pulse) supplied from the above-described control unit 40 to each functional unit such as the TDC 200 is stabilized at a predetermined value (step S201). Next, a calibration operation of the TDC 200 is performed (step S202). Note that details of the calibration operation according to the present embodiment will be described later.
Next, the Cosrse mode measurement illustrated in
Moreover, the TDC 200 determines whether the number of measurements N is larger than a predetermined value set in advance (step S205). In the present embodiment, it is preferable to improve the accuracy by repeating the measurement until the value becomes larger than a predetermined value and adopting, for example, an average value of values obtained by the measurement.
Accordingly, the predetermined value is preferably set to be large, but if the predetermined value is set to be large, the measurement time becomes long, and thus it is preferable to appropriately adjust the predetermined value according to the required distance measurement accuracy and the like. The TDC 200 proceeds to the processing of step S207 in a case where the number of measurements N is larger than the predetermined value (step S205: Yes), and proceeds to the processing of step S206 in a case where the number of measurements N is not larger than the predetermined value (step S205: No). Then, the TDC 200 increments the number of times of measurement N by 1, and the process returns to step S204 (step S206).
Next, the fine mode measurement illustrated in
Moreover, the TDC 200 determines whether the number of measurements N is larger than a predetermined value set in advance (step S209). In the present embodiment, it is preferable to improve the accuracy by repeating the measurement until the value becomes larger than a predetermined value and adopting, for example, an average value of values obtained by the measurement. The TDC 200 proceeds to the processing of step S211 in a case where the number of measurements N is larger than the predetermined value (step S209: Yes), and proceeds to the processing of step S210 in a case where the number of measurements N is not larger than the predetermined value (step S209: No). Then, the TDC 200 increments the number of times of measurement N by 1, and the process returns to step S208 (step S210).
Next, the TDC 200 performs an operation of a difference (measurement target TMEAS) between rise times or fall times of the two measured signals VT1 and VT2 by using the count result of the Coarse mode measurement and the measurement result of the fine measurement (step S211). Specifically, the TDC 200 integrates the time width of the difference VFN that is the measurement result of the fine measurement mode with respect to the multiplication of the delay amount (RG) based on the count result of the Cosrse mode measurement and the reference clock cycle TCLK, and ends the time measuring method according to the present embodiment. Note that, in the present embodiment, the predetermined value to be compared with the number of times of measurement N in each step described above may be the same or different from each other in each step. Furthermore, in
As described above, in the present embodiment, the fine measurement unit 210 measures the difference VFN between the delay signal VT1D generated by delaying the measured signal VT1 by a numerical value obtained by multiplying the delay amount (RG value) proportional to the width of the measured pulse VT2−T1 by the reference clock cycle TCLK, and the above-described measured signal VT2. The difference VFN is a difference between the VT1D and the measured signal VT2 generated in this manner, and thus has a width equal to or less than the reference clock cycle TCLK. Accordingly, in the present embodiment, since the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock cycle TCLK, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.
Next, the TDC 200 according to the first embodiment is modified as described below to eliminate the need for the ADC 106 having high resolution, and the counter 508 (see
First, a configuration example of the TDC 200 according to the present embodiment will be described with reference to
(TAC 500)
TAC 500 includes two TV conversion circuits 600a, 600b and a comparator 602 (see
(Selector 502)
The selector 502 selects either a signal from the pulse generator 202 (measured pulse VT2−T1) or a signal from the TAC 500 (enlarged difference FN) (see
(Synchronization Circuit 504)
The synchronization circuit 504 obtains a signal (measured pulse VT2−T1, enlarged difference FN) from the selector 502 in increments of a clock cycle TCLK of the reference clock signal CLK, generates a digital timing signal VCS, and outputs the digital timing signal VCS to an AND circuit 506 as described later.
(AND Circuit 506)
The AND circuit 506 receives the reference clock signal CLK and the signal output from the synchronization circuit 504 as inputs, and outputs the signal to the counter 508 when the two inputs are HIGH.
(Counter 508)
The counter 508 counts the signal output from the AND circuit in the clock cycle TCLK, and outputs the count result to the delay evaluation unit 206 and the operation unit 212. Note that, in the present embodiment, the counter 508 counts a signal (measured pulse VT2−T1) from the pulse generator 202 in the Coarse mode measurement, and counts a signal (enlarged difference FN) from the TAC 500 in the fine mode measurement. That is, in the present embodiment, the counter 508 is shared between the Coarse measurement unit 204 and the fine measurement unit 210.
Next, a configuration example of the TAC 500 according to the present embodiment will be described with reference to
(TV Conversion Circuits 600a, 600b)
Each of TV conversion circuits 600a, 600b includes an integrator including Gm amplifiers 604a, 604b and capacitors 606a, 606b, has integral slopes (S1, S2) (see
(Comparator 602)
The comparator 602 compares the voltage VIM output from the TV conversion circuits 600a, 600b with the voltage VIP, and when the voltage VIM is smaller than the voltage VIP, outputs a signal (enlarged difference) FN (see
Note that the comparator 602 may malfunction due to input of noise or the like from a power supply (not illustrated) after initialization, and even if malfunction occurs for about several nanoseconds, offset or variation occurs in a signal (enlarged difference) FN, which causes a distance measurement error. Therefore, in order to prevent such a malfunction of the comparator 602, it is preferable to control the comparator 602 using the reference clock signal CLK or the like so that the activation (rising) of the comparator 602 after being initialized is delayed by a predetermined time from the rising time of the input delay signal VT1D. By such a control, since the comparator 602 can secure a sufficient time to be activated after initialization, the comparator 602 shifts to a stable state, and is activated from such a stable state, so that it is less likely to be affected by noise or the like. As a result, in the present embodiment, since a malfunction of the comparator 602 can be prevented, an offset or variation hardly occurs in the signal (enlarged difference) FN, and thus, it is possible to avoid occurrence of a distance measurement error.
Next, the operation of the TAC 500 according to the present embodiment will be described with reference to
First, the delay signal VT1D and the measured signal VT2 illustrated in the first and second rows from the top in
Moreover, the comparator 602 compares the voltage VIM output from the TV conversion circuits 600a, 600b with the voltage VIP, and outputs a signal (enlarged difference) FN (fifth row from the top in
The measurement target TFN can be expressed as the following Equation (7) on the basis of Equation (1).
Then, the time width TFNINC of the enlarged difference FN can be expressed by the following Equation (8) on the basis of the Equations (1) and (7).
Moreover, since the time width TFNINC of the enlarged difference FN is counted in the clock cycle TCLK, the time width TFNINC can be expressed by the following Equation (9).
[Math. 9]
T
FNICN
=T
CLK
*CNT (9)
Then, since the measurement target TFN can be expressed by the following Equation (10) by the Equations (8) and (9), the measurement target TFN can be calculated by the time width TFNINC of the enlarged difference FN.
Furthermore, as can be seen from the Equation (10), the measurement target TFN is measured with resolution determined from the integral slopes S1, S2 and the clock cycle TCLK, and specifically, is measured with high resolution equal to or less than the reference clock cycle TCLK. Then, since the resolution is determined by the ratio of the integral slopes S1 and S2 according to Equation (10), it can be seen that the resolution is robust against voltage variation and temperature variation.
As described above, in the present embodiment, by using the two TV conversion circuits 600a, 600b, the comparator 602, and the Coarse measurement unit 204 instead of the TV conversion circuit 100 and the ADC 106 of the fine measurement unit 210 of the TDC 200 according to the first embodiment described above, it is possible to eliminate the need for the ADC 106 having high resolution. Moreover, in the present embodiment, the fine measurement unit 210 shares a counter circuit with the Coarse measurement unit 204. As a result, in the present embodiment, the circuit configuration of the TDC 200 can be made compact, and an increase in manufacturing cost can be suppressed.
Moreover, in the present embodiment, since the measurement resolution of the measurement target TFN is determined by the ratio of the integral slopes S1, S2, it can be seen that the resolution is robust against voltage variation and temperature variation. Furthermore, in the present embodiment, in the measurement in the fine measurement mode, the measurement target TFN is not measured as it is, but the measurement is performed by enlarging the measurement target TFN to the time width TFNINC of the enlarged difference FN.
Note that, also in the present embodiment, a generator 410 capable of generating a delay signal at fine intervals using both rising and falling edges of the reference clock signal (CLK) as illustrated in
Moreover, the present embodiment may be modified as illustrated in
Specifically, in the present modification, each of the TV conversion circuits 600a, 600b has an integral slope (S1, S2) (see
Specifically, according to the Equation (7), the time width TFNINC of the enlarged difference FN can be expressed by the following Equation (11).
Then, since the measurement target TFN can be expressed by the following Equation (12) by the Equation (9), the measurement target TFN can be calculated by the time width TFNINC of the enlarged difference FN.
Furthermore, in the present modification, as can be seen from Equation (12), although the resolution is deteriorated as compared with the present embodiment, since the measurement target TFN is measured with the resolution determined from the integral slopes S1, S2 and the clock cycle TCLK, the measurement target TFN is measured with high resolution equal to or less than the reference clock cycle TCLK. Then, in the present modification, since the measurement resolution of the measurement target TFN is determined by the ratio of the integral slopes S1, S2, it can be seen that the resolution is robust against voltage variation and temperature variation. Note that, in the present modification, the integral slope S1 is preferably sufficiently larger than the integral slope S2, and as a result, the resolution can be further improved.
In the first and second embodiments described above, it is preferable to calibrate the TDC 200 in order to improve the measurement accuracy of the TDC 200. Therefore, calibration of the TDC 200 will be described as a third embodiment of the present disclosure with reference to
Specifically, in the present embodiment, time widths of a plurality of known pulse signals (pulse signals for calibration) are measured, and the TDC 200 is calibrated on the basis of the measurement result. As illustrated in
Note that, here, a generator 410 capable of generating a delay signal at fine intervals using both rising and falling edges of the reference clock signal (CLK) as illustrated in
First, for example, in the calibration method described below, the time widths of at least two known pulse signals generated using the reference clock signal CLK are measured. For example, a TR(N) signal in
Then, the TDC 200 performs measurement related to a signal having a pulse width for 0.5 cycles of the clock cycle TCLK. Next, the TDC 200 sets the number of calibrations N to 1 (step S301). Then, the TDC 200 generates a pulse width for 0.5 cycles of the clock cycle TCLK of the reference clock signal CLK and measures (counts) a time width of the generated pulse width (calibration 1) (step S302). The coordinates (ΔT1, ΔTout1) plotted on the graph illustrated in
Moreover, the TDC 200 determines whether the number of calibrations N is larger than a predetermined value set in advance (step S303). In the present embodiment, it is preferable to improve the accuracy of the calibration by repeating the calibration until the value becomes larger than a predetermined value and adopting, for example, an average value of values obtained by the calibration. Accordingly, the predetermined value is preferably set to be large, but if the predetermined value is set to be large, the calibration time becomes long, and thus it is preferable to appropriately adjust the predetermined value according to the required distance measurement accuracy and the like. The TDC 200 proceeds to the processing of step S305 in a case where the number of calibration N is larger than the predetermined value (step S303: Yes), and proceeds to the processing of step S304 in a case where the number of calibration N is not larger than the predetermined value (step S303: No). Then, the TDC 200 increments the number of times of calibrations N by 1, and the process returns to step S302 (step S304).
Next, the TDC 200 performs measurement related to a signal having a pulse width for 1.5 cycles of the clock cycle TCLK. Note that steps S305 to S308 in
Then, the TDC 200 performs measurement related to a signal having a pulse width for 1 cycle of the clock cycle TCLK. Note that steps S309 to S312 in
Moreover, the TDC 200 performs measurement related to a signal having a pulse width for 2 cycles of the clock cycle TCLK. Note that steps S313 to S316 in
Next, the TDC 200 calculates an average value of the count output values CNTn obtained as a result of measuring a plurality of times (step S317). Moreover, the TDC 200 calculates a gradient TG (time gain) and an offset time Toffset illustrated in
Then, the gradient TG (time gain) can be obtained from the average value of the count output values CNTn by the following Equation (14).
Moreover, the offset time Toffset can be obtained from the average value of the count output values CNTn by the following Equation (15).
Then, the calibration method according to the present embodiment ends. Note that, in the present embodiment, the measurement of the time width of the pulse signal is not necessarily performed in the order described above (Equations (13) to (15) described above follow the order of measurement described above). Furthermore, the present embodiment is not limited to measuring the time widths of the four known pulse signals, and for example, the present embodiment may be configured to measure the time widths of three known pulse signals, and is not particularly limited as long as the time widths of at least two known pulse signals are measured.
As described above, in the present embodiment, time widths of a plurality of known pulse signals (pulse signals for calibration) are measured, and the TDC 200 is calibrated on the basis of the measurement result, so that the measurement accuracy of the TDC 200 can be improved.
In the above description, the TDC 200 has been described as being used in the distance measuring device 1, but the TDC 200 is not limited to such use. For example, in a CMOS image sensor (not illustrated), a common column signal processing unit (not illustrated) is provided for each of a plurality of pixels arranged in the column direction. The column signal processing unit includes an integrated ADC that performs signal processing such as analog-degital (A/D) conversion on the pixel signal output from the pixel and outputs an output signal (for example, Patent Document 2 described above).
Specifically, the integrated ADC described above can be configured as illustrated in
As described above, the TDC 200 according to the present embodiment can be used in a column signal processing unit (not illustrated) of a CMOS image sensor (not illustrated). Note that the TDC 200 is not limited to such use, and may be provided in another device as long as the device is required to perform time measurement with high resolution.
As described above, in the present embodiment of the present disclosure, the time resolution of the TDC 200 can be improved. Specifically, in the present embodiment, the fine measurement unit 210 measures the difference VFN between the delay signal VT1D generated by delaying the measured signal VT1 by a numerical value obtained by multiplying the delay amount (RG value) proportional to the width of the measured pulse VT2−T1 by the reference clock cycle TCLK, and the above-described measured signal VT2. The difference VFN is a difference between the VT1D and the measured signal VT2 generated in this manner, and thus has a width equal to or less than the reference clock cycle TCLK. Accordingly, in the present embodiment, since the measurement range of the fine measurement unit 210 including the TV conversion circuit 100 can be narrowed to a width equal to or less than the reference clock cycle TCLK, the time resolution of the fine measurement unit 210 can be improved. As a result, in the present embodiment, the time resolution of the TDC 200 can be improved.
Each step in the time measuring method according to the embodiment described above does not necessarily have to be processed in the described order. For example, each step may be processed in a changed order as appropriate. Furthermore, instead of being processed in chronological order, each step may be processed partly in parallel or separately. Moreover, the processing of each step does not necessarily have to be processed according to the described method, and for example, may be processed by other methods by other functional blocks.
Moreover, at least a part of the time measuring method according to the embodiment described above can be configured by software as an information processing program that causes a computer to function. In a case where the time measuring method is configured by software, a program that achieves at least a part of these methods may be stored in a recording medium and read and executed by the distance measuring device 1 or the like or another device connected to the distance measuring device 1. Furthermore, the program that achieves at least a part of the time measuring method may be distributed via a communication line (including wireless communication) such as the Internet. Moreover, the program may be distributed via a wired line or a wireless line such as the Internet or stored in a recording medium in an encrypted, modulated, or compressed state.
While preferred embodiments of the present disclosure have been described above in detail with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is obvious that various variations and modifications can be conceived within the scope of the technical idea described in the claims by a person having ordinary knowledge in the field of technology to which the present disclosure belongs, and, of course, it is understood that these variations and modifications belong to the technical scope of the present disclosure.
Furthermore, the effects described in the present specification are merely illustrative or exemplary, and are not limitative. That is, the technique according to the present disclosure can exhibit other effects obvious to those skilled in the art from the description of the present specification together with the effects described above or instead of the effects described above.
Note that, the present technology can also adopt the following configuration.
(1)
A time measuring device including:
a first counter unit that acquires a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal;
a delay signal generation unit that generates a delay signal by delaying the first measured signal on the basis of the first measurement result fed back from the first counter unit;
a measurement unit that measures a difference time between the delay signal and the second measured signal as a second measurement result; and
an operation unit that performs an operation by using the first measurement result and the second measurement result.
(2)
The time measuring device according to (1), in which the first counter unit acquires, as the first measurement result, a difference time between a rise time or a fall time of the first measured signal having a substantially rectangular wave and a rise time or a fall time of the second measured signal having a substantially rectangular wave.
(3)
The time measuring device according to (2), in which the measurement unit measures, as the second measurement result, a difference time between a rise time or a fall time of the delay signal having a substantially rectangular wave and the rise time or the fall time of the second measured signal.
(4)
The time measuring device according to any one of (1) to (3), in which the delay signal generation unit generates the delay signal on the basis of a delay amount proportional to a value of the first measurement result.
(5)
The time measuring device according to any one of (1) to (4),
in which the delay signal generation unit includes
a plurality of flip-flop circuits arrayed in a line and evenly on a semiconductor substrate.
(6)
The time measuring device according to any one of (1) to (4),
in which the delay signal generation unit includes
a plurality of latch circuits arrayed in a line and evenly on a semiconductor substrate.
(7)
The time measuring device according to (5), in which each of the plurality of flip-flop circuits is electrically connected to wiring branched from a reference clock signal source in a tournament form.
(8)
The time measuring device according to (7), in which the delay signal generation unit generates the delay signal using a rising edge or a falling edge of the reference clock signal having a substantially rectangular wave.
(9)
The time measuring device according to (7), in which the delay signal generation unit generates the delay signal using a rising edge and a falling edge of the reference clock signal having a substantially rectangular wave.
(10)
The time measuring device according to (7), in which the delay signal generation unit generates a signal for calibration using the reference clock signal.
(11)
The time measuring device according to any one of (1) to (10), in which the measurement unit includes a time-voltage conversion circuit and an analog-digital conversion circuit.
(12)
The time measuring device according to any one of (1) to (10), in which the measurement unit includes a first time-voltage conversion circuit and a second time-voltage conversion circuit having different slopes, a comparator, and a second counter unit.
(13)
The time measuring device according to (12),
in which the comparator enlarges the difference time between the delay signal and the second measured signal on the basis of output signals from the first time-voltage conversion circuit and the second time-voltage conversion circuit to which the delay signal and the second measured signal are input, and
the second counter unit measures the difference time that has been enlarged, by counting the difference time on the basis of the reference clock signal.
(14)
The time measuring device according to (12) or (13), in which the measurement unit includes the first counter unit functioning as the second counter unit.
(15)
The time measuring device according to any one of (12) to (14), in which the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated at different timings.
(16)
The time measuring device according to any one of (12) to (14), in which the first time-voltage conversion circuit and the second time-voltage conversion circuit are activated simultaneously.
(17)
A time measuring method including:
acquiring a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal;
generating a delay signal by delaying the first measured signal on the basis of the first measurement result that has been fed back;
measuring a difference time between the delay signal and the second measured signal as a second measurement result; and
performing an operation by using the first measurement result and the second measurement result.
(18)
A distance measuring device that is a ToF distance measuring device including a time measuring device,
the time measuring device including:
a first counter unit that acquires a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal;
a delay signal generation unit that generates a delay signal by delaying the first measured signal on the basis of the first measurement result fed back from the first counter unit;
a measurement unit that measures a difference time between the delay signal and the second measured signal as a second measurement result; and
an operation unit that performs an operation by using the first measurement result and the second measurement result.
(19)
The distance measuring device according to (18), which is an indirect ToF distance measuring device that performs distance measurement on the basis of a phase difference.
1 Distance measuring device
20 Irradiation unit
30 Light receiving unit
40 Control unit
60 Processing unit
100, 600a, 600b TV conversion circuits
102, 202 Pulse generator
104 Integrator
106, 700 ADC
108 Delay device
200, 706 TDC
204 Coarse measurement unit
206 Delay evaluation unit
208 Delay signal generation unit
210 Fine measurement unit
212 Operation unit
300 Pixel drive pulse generator
302, 312, 322 Terminal
310 Laser drive pulse generator
320 Pixel unit
400
a, 400b, 502 Selector
410 Generator
420 Reference clock signal source
430 Decoder/selector
500 TAC
504 Synchronization circuit
506 AND circuit
508 Counter
602, 702 Comparator
604
a, 604b Gm amplifier
606
a, 606b Capacitor
704 Ripple counter
708 Transfer bus
800 Object
802
a, 802b Region
Number | Date | Country | Kind |
---|---|---|---|
2020-007119 | Jan 2020 | JP | national |
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/JP2021/000433 | 1/8/2021 | WO |