Claims
- 1. A trench MOS-gated device comprising:a substrate including an upper layer having an upper surface, said substrate comprising doped monocrystalline semiconductor material of a first conduction type; a gate trench in said upper layer, said trench having sidewalls and a floor lined with a first dielectric material and a centrally disposed core comprising a second dielectric material and extending upwardly from said first dielectric material on said trench floor to an interlevel dielectric layer disposed on said upper layer and overlying said gate trench, the remainder of said trench being substantially filled with a conductive material that encompasses and contacts said core of second dielectric material; a doped well region of a second conduction type overlying a drain zone of said first conduction type in said upper layer; a heavily doped source region of said first conduction type and a heavily doped body region of said second conduction type disposed in said well region at said upper surface, said source region being contiguous to said gate trench, said interlevel dielectric layer overlying said source region and said gate trench; and a metal layer overlying said upper surface and said interlevel dielectric layer, said metal layer being in electrical contact with said source and body regions.
- 2. The device of claim 1 wherein said core of second dielectric material extends upwardly to contact said interlevel dielectric layer.
- 3. The device of claim 1 wherein said upper layer is included in said substrate.
- 4. The device of claim 1 wherein said upper layer is an epitaxial layer.
- 5. The device of claim 1 wherein said substrate comprises monocrystalline silicon.
- 6. The device of claim 1 wherein said first dielectric material comprises silicon dioxide.
- 7. The device of claim 1 wherein said second dielectric material is spin on glass (SOG), borophosphosilicate glass (BPSG), or a polyimide.
- 8. The device of claim 1 wherein said core of second dielectric material and said interlevel dielectric layer each comprise borophosphosilicate glass (BPSG).
- 9. The device of claim 1 wherein said conductive material in said trench comprises doped polysilicon.
- 10. The device of claim 1 wherein said first conduction type is N and said second conduction type is P.
- 11. The device of claim 1 is selected from the group consisting of a power MOSFET, an insulated gate bipolar transistor, and an MOS-controlled thyristor.
CROSS-REFERENCE TO RELATED APPLICATION
This application is related to co-pending, commonly assigned application Ser. No. 09/992,629, filed Nov. 6, 2001 by Hao et al. for TREWNCH MOSFET WITH LOW GATE CHARGE.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
6312993 |
Hshieh et al. |
Nov 2001 |
B1 |