Vector signaling code with improved noise margin

Abstract
Methods are described allowing a vector signaling code to encode multi-level data without the significant alphabet size increase known to cause symbol dynamic range compression and thus increased noise susceptibility. By intentionally restricting the number of codewords used, good pin efficiency may be maintained along with improved system signal-to-noise ratio.
Description
REFERENCES

The following references are herein incorporated by reference in their entirety for all purposes:


U.S. Patent Publication No. 2011/0268225 of U.S. patent application Ser. No. 12/784,414, filed May 20, 2010, naming Harm Cronie and Amin Shokrollahi, entitled “Orthogonal Differential Vector Signaling” (hereinafter “Cronie I”);


U.S. Patent Publication No. 2011/0302478 of U.S. patent application Ser. No. 13/154,009, filed Jun. 6, 2011, naming Harm Cronie and Amin Shokrollahi, entitled “Error Control Coding for Orthogonal Differential Vector Signaling” (hereinafter “Cronie II”);


U.S. patent application Ser. No. 13/030,027, filed Feb. 17, 2011, naming Harm Cronie, Amin Shokrollahi and Armin Tajalli, entitled “Methods and Systems for Noise Resilient, Pin-Efficient and Low Power Communications with Sparse Signaling Codes” (hereinafter “Cronie III”);


U.S. Patent Publication No. 2011/0299555 of U.S. patent application Ser. No. 13/154,009, filed Jun. 6, 2011, naming Harm Cronie and Amin Shokrollahi, entitled “Error Control Coding for Orthogonal Differential Vector Signaling” (hereinafter “Cronie IV”);


U.S. Provisional Patent Application No. 61/763,403, filed Feb. 11, 2013, naming John Fox, Brian Holden, Ali Hormati, Peter Hunt, John D Keay, Amin Shokrollahi, Anant Singh, Andrew Kevin John Stewart, Giuseppe Surace, and Roger Ulrich, entitled “Methods and Systems for High Bandwidth Chip-to-Chip Communications Interface” (hereinafter called “Fox I”);


U.S. Provisional Patent Application No. 61/773,709, filed Mar. 6, 2013, naming John Fox, Brian Holden, Peter Hunt, John D Keay, Amin Shokrollahi, Andrew Kevin John Stewart, Giuseppe Surace, and Roger Ulrich, entitled “Methods and Systems for High Bandwidth Chip-to-Chip Communications Interface” (hereinafter called “Fox II”);


U.S. Provisional Patent Application No. 61/812,667, filed Apr. 16, 2013, naming John Fox, Brian Holden, Ali Hormati, Peter Hunt, John D Keay, Amin Shokrollahi, Anant Singh, Andrew Kevin John Stewart, and Giuseppe Surace, entitled “Methods and Systems for High Bandwidth Communications Interface” (hereinafter called “Fox III”);


U.S. patent application Ser. No. 13/842,740, filed Mar. 15, 2013, naming Brian Holden, Amin Shokrollahi, and Anant Singh, entitled “Methods and Systems for Skew Tolerance and Advanced Detectors for Vector Signaling Codes for Chip-to-Chip Communication” (hereinafter called “Holden I”);


U.S. patent application Ser. No. 13/895,206, filed May 15, 2013, naming Roger Ulrich and Peter Hunt, entitled “Circuits for Efficient Detection of Vector Signaling Codes for Chip-to-Chip Communications using Sums of Differences” (hereinafter called “Ulrich I”).


U.S. Provisional Patent Application No. 61/934,804, filed Feb. 2, 2014, naming Ali Hormati and Amin Shokrollahi, entitled “Method for Code Evaluation using ISI Ratio” (hereinafter called “Hormati I”).


U.S. Provisional Patent Application No. 61/839,360, filed Jun. 23, 2013, naming Amin Shokrollahi, entitled “Vector Signaling Codes with Reduced Receiver Complexity” (hereinafter called “Shokrollahi I”).


U.S. Patent Application No. 61/934,800, filed Feb. 2, 2014, naming Amin Shokrollahi and Nicolae Chiurtu, entitled “Low EMI Signaling for Parallel Conductor Interfaces” (hereinafter called “Shokrollahi II”).


TECHNICAL FIELD

The present invention relates to communications in general and in particular to the transmission of signals capable of conveying information and detection of those signals in chip-to-chip communication.


BACKGROUND

In communication systems, a goal is to transport information from one physical location to another. It is typically desirable that the transport of this information is reliable, is fast and consumes a minimal amount of resources. One common information transfer medium is the serial communications link, which may be based on a single wire circuit relative to ground or other common reference, or multiple such circuits relative to ground or other common reference. A common example uses singled-ended signaling (“SES”). SES operates by sending a signal on one wire, and measuring the signal relative to a fixed reference at the receiver. A serial communication link may also be based on multiple circuits used in relation to each other. A common example of the latter uses differential signaling (“DS”). Differential signaling operates by sending a signal on one wire and the opposite of that signal on a matching wire. The signal information is represented by the difference between the wires, rather than their absolute values relative to ground or other fixed reference.


There are a number of signaling methods that maintain the desirable properties of DS while increasing pin efficiency over DS. Vector signaling is a method of signaling. With vector signaling, a plurality of signals on a plurality of wires is considered collectively although each of the plurality of signals might be independent. Each of the collective signals is referred to as a component and the number of plurality of wires is referred to as the “dimension” of the vector. In some embodiments, the signal on one wire is entirely dependent on the signal on another wire, as is the case with DS pairs, so in some cases the dimension of the vector might refer to the number of degrees of freedom of signals on the plurality of wires instead of exactly the number of wires in the plurality of wires.


With binary vector signaling, each component or “symbol” of the vector takes on one of two possible values. With non-binary vector signaling, each symbol has a value that is a selection from a set of more than two possible values. The set of values that a symbol of the vector may take on is called the “alphabet” of the vector signaling code. A vector signaling code, as described herein, is a collection C of vectors of the same length N, called codewords. Any suitable subset of a vector signaling code denotes a “sub code” of that code. Such a subcode may itself be a vector signaling code.


In operation, the coordinates of the codewords are bounded, and we choose to represent them by real numbers between −1 and 1. The ratio between the binary logarithm of the size of C and the length N is called the pin-efficiency of the vector signaling code.


A vector signaling code is called “balanced” if for all its codewords the sum of the coordinates is always zero. Balanced vector signaling codes have several important properties. For example, as is well known to those of skill in the art, balanced codewords lead to lower electromagnetic interference (EMI) noise than non-balanced ones. Also, if common mode resistant communication is required, it is advisable to use balanced codewords, since otherwise power is spent on generating a common mode component that is cancelled at the receiver.


An example of a typical systems environment incorporating vector signaling code communication as described in the prior art is shown in FIG. 1. As will be subsequently described, one goal of the present invention is to provide improved performance, particularly regarding signal to noise ratio, while maintaining as much as possible this systems environment.


Information to be transmitted 100 is obtained from a source SRC and presented to transmitter 120. Within the transmitter, the information is encoded 122 as symbols of a vector signaling code 125, which are then presented to transmit driver 128, generating physical representations of the code symbols on a collection of wires 145 which together comprise the communications channel 140.


Receiver 160 accepts physical signals from communications channel 140, detects the received codewords using, as one example, a collection of differential binary multi-input comparators (as taught by Holden I) 166, and then decodes 168 those detected values 167 to obtain the received information 180 output to a destination device DST. For some preferred encoder mappings, detected binary values 167 may map directly to bits of received information 180, making an explicit decoding operation unnecessary.


In a practical embodiment, signals 145 may undergo significant change in amplitude, waveform, and other characteristics between emission by transmitter 120 and arrival at receiver 160, due to the transmission characteristics of communications channel 140. Therefore, it is common practice to incorporate signal amplification and/or equalization 162 into communications channel receivers.


Additional examples of vector signaling methods are described in Cronie I, Cronie II, Cronie III, Cronie IV, Fox I, Fox II, Fox III, Holden I, Shokrollahi I, Shokrollahi II, and Hormati I.


BRIEF DESCRIPTION

Combining multi-level signaling with a vector signaling code results in significant increase in the number of available codewords. Properties and the construction method of such combinations are disclosed where the number of active codewords in the combined code is intentionally restricted to provide increased detection threshold for receive detectors, thus improving the signal-to-noise ratio of the resulting system.





BRIEF DESCRIPTION OF FIGURES


FIG. 1 is an example of a typical prior art systems environment incorporating vector signaling code communication.



FIG. 2 is a block diagram of a system of vector signaling code communication.



FIG. 3 is a block diagram of illustrating vector code signaling communication using a pre-coding operation to constrain the code space alphabet.



FIG. 4 is a schematic of a circuit for a generalized comparator providing PAM-X slicing.



FIG. 5 is a graph showing SNR increase versus number of transmitted bits per codeword for one embodiment of the invention.



FIG. 6 is a graph showing SNR increase versus number of transmitted bits per codeword for another embodiment of the invention.



FIG. 7 is a block diagram showing a method of obtaining improved SNR using vector signaling codes with a constrained alphabet.



FIG. 8 is a block diagram showing an alternative method of obtaining improved SNR using vector signaling codes with a constrained alphabet, wherein the constraint computations are performed offline.



FIG. 9 is a flowchart showing a method in accordance with at least one embodiment of the invention.





DETAILED DESCRIPTION

When using the Hadamard Transform, or some other orthogonal transform, to construct vector signaling codes the code alphabet size may grow to be considerably larger than that of the input data alphabet. As one example, the ENRZ code described in FOX II and called H4 code by Cronie I encodes three binary data bits into a four element codeword with a four value alphabet. Typically, the larger the code alphabet size, the smaller the swing at the comparator outputs used to detect the code, and therefore the smaller the SNR of the system in terms of vertical eye opening. In the case of ENRZ, the code is constrained to only require two of the four possible alphabet values in any given codeword, thus avoiding this problem. For codes not naturally providing such constraints, it may be desirable to decrease the code alphabet size at the expense of (slightly) lowering the pin-efficiency. Methods are described to achieve this kind of tradeoff.


Multi-Level Data and Orthogonal Vector Signaling Code


Expanding on the description taught in Cronie I and other prior art, the construction of orthogonal vector signaling codes encoding multi-level Input Data proceeds as illustrated in FIG. 2. Given an interface size N−1 for communications channel 235, an orthogonal matrix A as at 220 is chosen that has N rows and N columns and such that the sum of the columns of A is a column consisting entirely of zeros except in one position (for example, the first position.) Given matrix A and multi-level Input Data described herein as vector c, the codewords are constructed via the multiplication

(0,c1,c2, . . . ,cN-1)*A  (Eqn. 1)

wherein the ci may belong to a constellation of PAM-M values, and wherein PAM-M denotes the set {M−1, M−3, . . . , 3−M, 1−M}/(M−1). By convention, the matrix multiplication of Equation 1 is generally combined with a normalization operation, in which all results are divided by a scaling factor to keep the range of results within the bounds +1 to −1. The N coordinates of the scaled results 225 are transmitted on the N communication wires 235 using drivers 230.


At the receiver, the received values (v1, . . . , vN) on the wires are processed by a receiver front end 240 that performs tasks such as continuous time linear equalization and amplification to compensate for transmission line losses, and the processed received signals 245 are forwarded to a linear combinatorial network 250. The result of this network 255 is functionally equivalent to performing the matrix multiplication









B
*

(




v
1











v
n




)





(

Eqn
.




2

)








where B is the matrix consisting of rows 2, . . . , N of A in the case where the sum of the columns of A is nonzero in the first position. More generally, if the sum of the columns of the matrix A is nonzero in position k, say, then B consists of all rows of A except row k. Again, by convention this matrix multiplication of Equation 2 is generally combined with a normalization operation in which all results are divided by a scaling factor to keep the range of results within the bounds +1 to −1.


If A is a Hadamard matrix, one example of a suitable linear combinatorial network is that of the well-known Fast Walsh Transform; another example is the multi-input differential comparator of Holden I operated in a linear output mode.


The individual components of this new vector are then passed through a PAM-M detector 260 wherein the thresholds of the detector are set appropriately to detect the M levels produced by the matrix multiplication of Eqn. 2 at 255. These detected results 265 are then decoded 270 to produce Output Data.


Alphabet Size


The individual coordinates after the multiplication of Equation 1 may belong to an alphabet of size larger than M, which is the size of the original alphabet of the ci. For example, where A is a Hadamard matrix, the size of the alphabet (that is, the total number of different signal levels transmitted on the wires) may grow to (N−1)*(M−1)+1, which can be quite a large number. More significantly, the range of values represented by this enlarged alphabet also grows, thus the normalization operation required to scale the matrix multiplication results to the range +1 to −1 (e.g. so that they may be transmitted over a physical communications medium using fixed and thus limited driver voltage sources) requires division by larger scaling factors, resulting in the steps between alphabet values shrinking. Thus, when transmitted over a noisy communications channel, these increasing scale factors can lead to a reduced signal-to-noise ratio (SNR) on the wire.


This expansion of the matrix multiplication result range is similar to the increased crest factor observed in CDMA communications systems as the number of modulation channels is increased. Either additional transmission power must be provided to support higher peak signal strength, or the overall transmission envelope is maintained within a constrained range and the individual channel SNR decreases.


To avoid these reduced SNR effects, it is desirable to constrain the alphabet required to communicate the results of the Equation 1 multiplication. Cronie II describes pruning of the symbol constellation produced by an encoding matrix multiplications as in Equation 1 to maximize the Euclidian distance between the signals generated by the encoding operation relative to the noise power of the communications channel. Although that constraint method improves SNR, it also significantly reduces the amount of data transmitted per pin or pin efficiency, and does not directly address the increased normalization scaling factor required.


Enhancing Detection SNR


In the method to be applied here we choose the vector (c1, c2, . . . , cN-1) from a constrained set of vectors, also called a “pre-code” in the following, in such a way as to decrease the alphabet size produced by the multiplication of Equation 1 by eliminating extreme values, thus eliminating the need for larger normalization factors for the results. In at least one embodiment, the constrained set of vectors is determined as a portion of a maximal set of vectors, and the transformation applied representing multiplication of the constrained set of vectors with a non-simple orthogonal matrix forms constrained-alphabet codewords of a constrained-alphabet vector signaling code. These constrained-alphabet codewords include elements having values selected from a constrained post-transformation alphabet formed by the transformation of the constrained set of vectors. This constrained post-transformation alphabet is a reduced version excluding extreme values (i.e. values having large respective magnitudes) of a non-constrained post-transform alphabet that would be formed by applying the transformation to the maximal set of vectors. As mentioned above, this constrained post-transformation alphabet requires smaller normalization factors, which in turn increases the SNR of a system in accordance with at least one embodiment of the invention.


This can be done in a variety of ways, as described below using the illustration of FIG. 3. Pre-encoder 310 maps a given number of Input Data bits (or higher-order symbols) into a codeword 315 of the pre-code prior to encoding matrix multiplication 320, and a decoder 370 maps the detected results 365 to Output Data bits (or higher order symbols.) Decoder 370 may incorporate both a pre-code decoding function and the result mapping decode operation of decoder 270 of FIG. 2; in some embodiments, one or both of these decoding operations may be null or a direct mapping. Encoding matrix 220, decoding linear combinatorial network 250, PAM-X slicer 260, driver 230, and receiver front end 240 are functionally identical in their FIG. 2 and FIG. 3 depictions, while signals 325, 335, and 345 are numbered as distinct from their respective FIG. 2 equivalents 225, 235, and 245 solely due to the range constraint of their values produced by the invention in their FIG. 3 versions.


Forcing to Zero


In a first example embodiment, a given number of the ci are forced to be zero, constraining the scope of the resulting matrix multiplication results. Where k of the ci are forced to be equal to zero, the constrained post-transformation alphabet size after the multiplication in Equation 1 will grow to at most a size of (N−k−1)*(M−1)+1 for a Hadamard matrix. This can be substantially smaller in certain cases. Moreover, unlike in the method of Cronie II, the reduction of the code-space may not be too much. Since the forced value of 0 will be part of the detected results (as in 355 of FIG. 3) and needs to be detected, this method is applied when the ci belong to a PAM-M constellation with M being an odd number.


As a specific example, consider an embodiment with N=4, M=3, and the Hadamard matrix of size 4. In this case the unconstrained pre-code has 27 elements, and the unconstrained post-transform alphabet size is 7. However, choosing a constrained set of vectors (c1, c2, c3) which contain at least one zero, i.e., k=1, a constrained post-transform alphabet having a size of 5 is formed. The number of such constrained-alphabet codewords is 19; the 12 permutations of (1,0,0,−1), the 6 permutations of (½,½,−½,−½), and the vector (0,0,0,0). In at least one embodiment, the codeword (0,0,0,0) is not chosen for transmission, in order to have the same amount of power used for every transmitted codeword. Among the remaining 18 constrained-alphabet codewords any 16 can be chosen for transmission, encoding four binary bits of data. The remaining two constrained-alphabet codewords are available for control functions, pattern breaking, or other auxiliary communication use.


An encoder embodiment for the precode operation is now described with reference to the specific precode consisting of all the 12 permutations of the vector (1,0,0,−1), and the four additional vectors (½, ½, −½, −½) (−½, ½, ½, −½), (−½,−½,½,½), and (½,−½,−½,½). The task of this encoder is to produce four bit vectors u, v, w, s from a four bit input (a,b,c,d). In operation, the encoded vector is equal to u−v+(w−s)/2. In other words, u encodes the positions of the 1's, v encodes the position of the −1's, w encodes the positions of the ½'s, and s encodes the positions of the −½'s. Explicit logical formulas are given below. In these formulas, “*” is the logical AND, custom characterc is the logical inverse of c, “xor” denotes the xor operation, and “nor” denotes the logical NOR operation.


If (a*b)=0, then:

u=(c*d,custom characterc*d,c*custom characterd,nor(c,d))
v=(xor(c,custom charactera)*xor(d,custom characterb),xor(c,a)*xor(d,custom characterb),xor(c,custom charactera)*xor(d,b),xor(c,a)*xor(d,b)
w=(0,0,0,0),s−(0,0,0,0)
If(a*b)=1,then:
u=(0,0,0,0)
v=(0,0,0,0)
w=(custom characterxor(c,d),custom characterc,xor(c,d),c)
s=(xor(c,d),c,(custom characterxor(c,d),custom characterc)


As a second example, consider an embodiment with N=8, M=3, and the Hadamard matrix of size 8. In this case the unconstrained pre-code has 37=2187 elements and an unconstrained post-transformation alphabet of size (N−1)*(M−1)+1=15. Choosing a pre-code comprising all PAM-3 vectors of length 7 with at least one 0, one obtains a pre-code of size 2187−128=2059 which means that it is still possible to transmit 11 bits on the 8 communication wires. The constrained post-transformation alphabet has a size of (N−2)*(M−1)+1=13. The SNR increase is 20*log 10( 15/13)=1.24 dB.


In an alternative embodiment where k=4, i.e. in which it is required that at least four of the coordinates of (c1, c2, . . . , c7) be zero, this construction yields a pre-code of size 379 which is sufficient for transmission of 8 bits on the 8 wires. The constrained post-transformation alphabet size is in this case 3*(M−1)+1=7. The SNR increase is 20*log 10(15/7)=6.62 dB. This SNR increase was achieved by reducing the rate from 11 bits to 8 bits on 8 wires, i.e., by a reduction of the rate by roughly 38%.


Table I shows the SNR increase for embodiments N=8, M=5, and various values of k. In this case the unconstrained pre-code is capable of transmitting 16 bits over the 8 wire interface.















TABLE I







k = 0
k = 1
k = 2
k = 3
k = 4























#bits
15
15
13
11
8



SNR
2.97
6.46
10.7
16.0
23.4



increase











It may be observed from the results of Table I that it is advantageous to increase the SNR by 6.46 dB (i.e. k=1) while losing 1 bit over the unconstrained transmission. Transmission with a pin efficiency of 1 (8 binary bits over the 8 wire interface) is also possible (k=4) and leads to an SNR increase of 23.4 dB.


Explicit Codespace Pruning


Although the ‘forcing to zero’ method requires only a fairly simple pre-coder, other methods of constraining the emitted set of codewords to avoid extreme alphabet values may provide more flexibility and/or a larger usable codespace.


As a first example, consider an embodiment in which the matrix A is the Hadamard matrix of order 8, and where M=2, i.e., the ci are +1 or −1. Without a pre-code, the size of the unconstrained post-transformation alphabet after the multiplication in Equation 1 is 8, and the unconstrained post-transformation alphabet (after normalization) consists of the values ±1, ± 5/7, ± 3/7, ± 1/7. There are exactly 16 vectors (0, c1, . . . , c7) leading to the alphabet elements ±1. These are the codewords of the [7,4,3] Hamming code (using binary antipodal modulation of the bits):

  • [[1, 1, 1, 1, 1, 1, 1], [−1, −1, −1, 1, 1, 1, 1], [−1, 1, 1, −1, −1, 1, 1], [1, −1, −1, −1, −1, 1, 1], [1, −1, 1, −1, 1, −1, 1], [−1, 1, −1, −1, 1, −1, 1], [−1, −1, 1, 1, −1, −1, 1], [1, 1, −1, 1, −1, −1, 1], [−1, −1, 1, −1, 1, 1, −1], [1, 1, −1, −1, 1, 1, −1], [1, −1, 1, 1, −1, 1, −1], [−1, 1, −1, 1, −1, 1, −1], [−1, 1, 1, 1, 1, −1, −1], [1, −1, −1, 1, 1, −1, −1], [1, 1, 1, −1, −1, −1, −1], [−1, −1, −1, −1, −1, −1, −1]].


Thus, this method comprises identification of matrix multiplication results containing predetermined unacceptable alphabet values and the particular input values to that multiplication which results in generation of those codewords. The pre-code operation thus requires elimination (or equivalently, exclusion from the data-to-precode mapping) of those matrix multiplication input vectors. For descriptive purposes, this document refers to this method of pre-coding as “explicit codespace pruning”, as the pre-code explicitly avoids generating particular output vectors leading to unacceptable codewords.


Disallowing these vectors, the result of the multiplication in Equation 1 will belong to a constrained post-transformation alphabet of size 6, which after normalization can be viewed as ±1, ±⅗, ±⅕. The resulting vector signaling code is capable of transmitting one of 128−16=112 codewords in every transmission, and its SNR is 20*log10( 4/3)=2.5 dB better than the unconstrained case. The rate loss of this signaling code as compared to the unconstrained code is 7−log2(112)˜0.19, which is less than 3%.


Another example is provided by an embodiment in which N=8, and M=4. In this case A is again a Hadamard matrix of size 8. If the vectors (0, c1, . . . , c7) are unconstrained, then the size of the resulting unconstrained post-transformation alphabet is 22. By disallowing the same 16 vectors as in the previous example, the size of the constrained post-transformation alphabet is reduced to 20 and the SNR is increased by 20*log 10( 22/20)=0.83 dB. Disallowing another appropriate set of 112 vectors leads to a constrained post-transformation alphabet of size 18 and an increase of SNR by 20*log 10( 22/18)=1.74 dB. The set to be disallowed is obtained in the following way: We choose for the vector (0, c1, . . . , c7) all possible combinations except those in which (c1, . . . , c7) is one of the vectors of the [7,4,3] Hamming code above, or if (c1, . . . , c7) is obtained from such a vector by replacing any of the entries by ±⅓, and wherein the sign is chosen to be equal to the sign of the original entry (so, for example, the vector (−1, −⅓, −1, 1, 1, 1, 1) is disallowed since it is obtained from the vector (−1,−1,−1,1,1,1,1) by replacing the third entry by −⅓). Further improvements of the SNR are possible by disallowing a progressive number of possibilities for the vector (c1, . . . , c7): Disallowing another 448 vectors reduces the number of codewords of the precode to 47−448−112−16=15808, i.e., reduces the number of transmitted bits from 14 to 13.94, reduces the alphabet size to 16, and increases the SNR by 20*log 10( 22/16)=2.76 dB.



FIG. 5 shows the evolution of the increase in SNR versus the number of transmitted bits if this process is continued down to an alphabet of size 6. In that case, about 7.8 bits are transmitted on the 8 wires, while the SNR is increased by 11.3 dB.


Explicit codespace pruning is not only applicable to PAM-M transmission when M is even. It can also be applied to the case of odd M. An example is provided by an embodiment in which N=8, and M=3. In this case A is again a Hadamard matrix of size 8. If the vectors (0, c1, . . . , c7) are unconstrained, then the size of the resulting unconstrained post-transformation alphabet is 15. By disallowing the same 16 vectors as in the example for M=2, the size of the constrained post-transformation alphabet is reduced to 13 and the SNR is increased by 20*log 10( 15/13)=1.24 dB, while the number of codewords is reduced from 37=2187 to 2171. The number of transmitted bits is reduced from 11.095 to 11.084. This same result is achieved by the zero-forcing method.


Disallowing a further set of 112 vectors leads to a constrained post-transformation alphabet of size 11 and an increase of SNR by 20*log 10( 15/11)=2.69 dB. The set to be disallowed is obtained in the following way: We choose for the vector (0, c1, . . . , c7) all possible combinations except those in which (c1, . . . , c7) is one of the vectors of the [7,4,3] Hamming code above, or if (c1, . . . , c7) is obtained from such a vector by replacing any of the entries by 0 (so, for example, the vector (−1, 0, −1, 1, 1, 1, 1) is disallowed since it is obtained from the vector (−1,−1,−1,1,1,1,1) by replacing the third entry by 0).


Further improvements of the SNR are possible by disallowing a progressive number of possibilities for the vector (c1, . . . , c7): Disallowing another 448 vectors reduces the number of codewords of the precode to 37−448−112−16=1611, i.e., reduces the number of transmitted bits from 11.095=log2(37) to 10.65, reduces the constrained post-transformation alphabet size to 9, and increases the SNR by 20*log 10(15/9)=4.44 dB.



FIG. 6 shows the evolution of the increase in SNR versus the number of transmitted bits if this process is continued down to an alphabet of size 3. In that case, about 3.9 bits are transmitted on the 8 wires, while the SNR is increased by 13.98 dB.


Offline Codebook Generation


A generic diagram illustrating the previously described methods is shown as the block diagram of FIG. 7. Given the goal of producing encoded outputs 725 not containing codewords having extreme alphabet values, Input Data is pre-coded 710, producing an interim vector 715 which, when encoded 720 by a matrix operation, produces a satisfactory Encoded Data 725 result. The pre-coding step may be based on expanding the Input data into a vector containing forced zero values, mapping the input data into allowable vectors rather than disallowed vectors which would lead to unwanted codes, etc.


As shown in FIG. 8, the previously-described encoding methods may be incorporated in an offline analysis process 810. A constrained post-transformation alphabet is determined, being a proper subset of the original unconstrained post-transformation alphabet from which extreme alphabet values are excluded. All possible (i.e. encodable by matrix multiplication 710) values are enumerated and each such value encoded by matrix multiplication 710, producing all possible codewords 815. Each codeword 815 is tested 840 to verify every symbol of that codeword is a member of the constrained post-transformation alphabet. The resulting set of codewords passing this test 845 may then be used by a codebook encoder 850 which performs a simple codebook lookup, mapping each Input Data value to a selected codeword of the set of codewords 845, and outputting the selected codeword as its Encoded Data output.


Combination Designs


It will be apparent to one familiar with the art that the functional combinations and resulting circuit optimizations taught in the prior art may be equally well applied in combination with the present invention.


One embodiment illustrated as FIG. 4 utilizes a generalized comparator as taught by Holden I or Ulrich I to integrate linear combinatorial network 250 and PAM-X slicer 260 and obtain binary outputs representing the PAM-X values. In this integrated design, multiple input differential front end stage 410 (herein shown without limitation as paralleled differential amplifier elements sharing common loads as in Ulrich I) processes receiver signals A, B, C, and D, while each high gain digital comparator element of back end 420 (herein shown without limitation as a pair of high gain comparators) is provided with a reference or offset voltage appropriate to slice the combinatorial network outputs produced by 410 at one or more PAM-X threshold levels. In a preferred embodiment, multiple comparator outputs shown in FIG. 4 as SliceOut1 and SliceOut2 having reference level offsets Vth1 and Vth2 respectively, are associated with each integrated design instance. As will be obvious to one familiar with the art, any of a wide range of known PAM-X slicers, comparators, or threshold detectors may be used in place of the example comparators.


Embodiments

In accordance with at least one embodiment, a system comprises: a plurality of conductors configured to receive a set of input data bits; a pre-encoder configured to map the set of input data bits into symbols of a pre-code codeword of a pre-code, wherein the pre-code comprises a constrained set of vectors determined from a maximal set of vectors, and wherein the pre-code is associated with a constrained post-transformation alphabet comprising a portion of low magnitude symbol values selected from an unconstrained post-transformation alphabet associated with the maximal set of vectors; an encoder configured to generate a constrained-alphabet codeword of a constrained-alphabet vector signaling code, the constrained-alphabet codeword representing a transformation of the pre-code codeword with a first non-simple orthogonal matrix, wherein the constrained-alphabet codeword comprises symbols of the constrained post-transformation alphabet; and, a driver configured to transmit the constrained-alphabet codeword on a multi-wire communication bus.


In at least one embodiment, each vector in the constrained set comprises N−1 symbols, each symbol having a value selected from a constellation of PAM-M values, and the first non-simple orthogonal matrix has a size of N, wherein N and M are integers greater than or equal to 3. In at least one embodiment, the unconstrained post-transformation alphabet comprises (N−1)*(M−1)+1 possible symbol values. In at least one embodiment, M is odd, and wherein each vector in the constrained set comprises k symbols equal to 0, and the constrained post-transformation alphabet comprises (N−k−1)*(M−1)+1 possible symbol values, wherein k is an integer greater than or equal to 1.


In at least one embodiment, the constrained post-transformation alphabet comprises predetermined low magnitude values selected from the unconstrained post-transformation alphabet. In at least one embodiment, the portion of low magnitude symbol values have magnitudes under a predetermined threshold.


In at least one embodiment, the first non-simple orthogonal matrix is a Hadamard matrix. In at least one embodiment, the Hadamard matrix has a size of at least 4. In at least one embodiment, the pre-encoder comprises logic elements configured to map the set of input data bits to the pre-code codeword. In at least one embodiment, the constrained-alphabet vector signaling code is a balanced code. In at least one embodiment, the constrained-alphabet vector signaling code is ternary.


In at least one embodiment, the system further comprises a receiver, the receiver comprising: a multi-wire communication bus configured to receive the constrained-alphabet codeword; a linear combination network configured to obtain the pre-code codeword based on a transformation of the constrained-alphabet codeword by a second non-simple orthogonal matrix, the second non-simple orthogonal matrix based on the first non-simple orthogonal matrix; and, a detector configured to detect the symbols of the pre-code codeword, and generate a set of output data bits representative of the set of input data bits. In at least one embodiment, the detector is a PAM-M detector, the PAM-M detector comprising a plurality of comparators configured to generate a plurality of comparator outputs, each comparator associated with a respective reference voltage of a set of reference voltages, and wherein the plurality of comparator outputs correspond to the output data bits.


In at least one embodiment in accordance with FIG. 9, a method 900 comprises: receiving a set of input data bits on a plurality of conductors at step 902; mapping the set of input data bits into symbols of a pre-code codeword of a pre-code, the pre-code corresponding to a constrained set of vectors determined from a maximal set of vectors at step 904; generating a constrained-alphabet codeword comprising elements of a constrained alphabet, the constrained-alphabet codeword representing a transformation of the pre-code codeword with a non-simple orthogonal matrix, wherein the constrained alphabet comprises a number m of low magnitude symbol values, the number m less than a total number n of symbol values in an unconstrained alphabet generated by transforming the maximal set of vectors with the non-simple orthogonal matrix, and wherein n and m are integers, n greater than 1 and m greater than 2 at step 906; and, transmitting the constrained-alphabet codeword at step 908.


In at least one embodiment, each vector in the constrained set comprises N−1 symbols, each symbol having a value selected from a constellation of PAM-M values, and the first non-simple orthogonal matrix has a size of N, wherein N and M are integers greater than or equal to 3. In at least one embodiment, the unconstrained alphabet comprises n=(N−1)*(M−1)+1 possible symbol values. In at least one embodiment, M is odd, and wherein each vector in the constrained set comprises k symbols equal to 0, and the constrained alphabet comprises m=(N−k−1)*(M−1)+1 possible symbol values, wherein k is an integer greater than or equal to 1.


In at least one embodiment, the constrained alphabet comprises predetermined low magnitude values selected from the unconstrained alphabet. In at least one embodiment, each of the m low magnitude symbol values have magnitudes under a predetermined threshold.


In at least one embodiment, the non-simple orthogonal matrix is a Hadamard matrix. In at least one embodiment, the Hadamard matrix has a size of at least 4. In at least one embodiment, the constrained-alphabet vector signaling code is a balanced code. In at least one embodiment, the constrained-alphabet vector signaling code is ternary.


In at least one embodiment, the method further comprises: receiving the constrained-alphabet codeword on a plurality of conductors; obtaining the pre-code codeword based on a transformation of the constrained-alphabet codeword with a second non-simple orthogonal matrix, the second non-simple orthogonal matrix based on the first non-simple orthogonal matrix; and, generating a set of output data bits by a detector, wherein the set of output data bits is generated based on the pre-code codeword, and are representative of the set of input data bits. In at least one embodiment, generating the set of output data bits comprises forming a plurality of comparator outputs using a plurality of comparators, each comparator associated with a respective reference voltage of a set of reference voltages.


The examples presented herein describe the use of vector signaling codes for communication over a point-to-point wire interconnection. However, this should not been seen in any way as limiting the scope of the described invention. The methods disclosed in this application are equally applicable to other interconnection topologies and other communication media including optical, capacitive, inductive, and wireless communications, which may rely on any of the characteristics of the described invention, including minimization of reception or detection resources by selective modification or subset selection of code space. The methods disclosed in this application are equally applicable to embodiments where the encoded information is stored and subsequently retrieved, specifically including dynamic and static random-access memory, non-volatile memory, and flash programmable memory. Descriptive terms such as “voltage” or “signal level” should be considered to include equivalents in other measurement systems, such as “optical intensity”, “RF modulation”, “stored charge”, etc.


As used herein, the term “physical signal” includes any suitable behavior and/or attribute of a physical phenomenon capable of conveying information. Physical signals may be tangible and non-transitory. “Code” and “codeword” may represent physically-representable constructs, capable of being recorded in physical media, embodied as physical devices, and communicated as measurable physical signals over physical interconnections.

Claims
  • 1. A method comprising: generating a codebook using an offline process prior to system initialization, the codebook comprising a plurality of constrained-alphabet codewords of a constrained-alphabet code, the plurality of constrained-alphabet codewords being a subset of a maximal set of vectors having an associated unconstrained alphabet;obtaining a set of input bits;mapping the set of input bits to a set of symbols corresponding to a constrained-alphabet codeword having symbol values selected from a constrained alphabet having at least three values, the constrained alphabet having a fewer number of symbol values than the unconstrained alphabet, wherein mapping the set of input bits comprises selecting a corresponding constrained-alphabet codeword from the codebook; andtransmitting each symbol of the set of symbols over a respective wire of a multi-wire bus.
  • 2. The method of claim 1, wherein the constrained-alphabet code is generated by selecting, from the maximal set of vectors, codewords having symbol values within the constrained alphabet, the maximal set of vectors representing a transformation of a plurality of PAM-M codewords with a transformation matrix of size N, wherein M is an integer greater than 1 and N is an integer power of 2 greater than 1.
  • 3. The method of claim 2, wherein each of the plurality of PAM-M codewords has at least k zero elements, wherein k is an integer greater than or equal to 1.
  • 4. The method of claim 3, wherein the constrained alphabet is less than or equal to (N−k−1)·(M−1)+1.
  • 5. The method of claim 2, wherein M=2, and wherein each PAM-M codeword has symbol values selected from the group (+1, −1).
  • 6. The method of claim 2, wherein M=3, and wherein each PAM-M codeword has symbol values selected from the group (+1, 0, −1).
  • 7. The method of claim 2, wherein the transformation matrix is a Hadamard matrix.
  • 8. The method of claim 1, wherein the codebook comprises at least two constrained-alphabet codes.
  • 9. The method of claim 8, wherein a constrained-alphabet code is selected at system initialization.
  • 10. An apparatus comprising: a codebook generator configured to generate a codebook using an offline process prior to system initialization, the codebook comprising a plurality of constrained-alphabet codewords of a constrained-alphabet code, the plurality of constrained-alphabet codewords being a subset of a maximal set of vectors having an associated unconstrained alphabet;a codebook encoder configured to obtain a set of input bits, and to responsively map the set of input bits to a set of symbols corresponding to a constrained-alphabet codeword having symbol values selected from a constrained alphabet having at least three values, the constrained alphabet having a fewer number of symbol values than the unconstrained alphabet, wherein the codebook encoder is configured to select, for the set of input bits, a corresponding constrained-alphabet codeword from the codebook; anda plurality of drivers configured to transmit each symbol of the set of symbols over a respective wire of a multi-wire bus.
  • 11. The apparatus of claim 10, wherein the codebook generator is configured to generate the constrained-alphabet code by selecting, from the maximal set of vectors, codewords having symbol values within the constrained alphabet, the maximal set of vectors representing a transformation of a plurality of PAM-M codewords with a transformation matrix of size N, wherein M is an integer greater than 1 and N is an integer power of 2 greater than 1.
  • 12. The apparatus of claim 11, wherein each of the plurality of PAM-M codewords has at least k zero elements, wherein k is an integer greater than or equal to 1.
  • 13. The apparatus of claim 12, wherein the constrained alphabet is less than or equal to (N−k−1)·(M−1)+1.
  • 14. The apparatus of claim 11, wherein M=2, and wherein each PAM-M codeword has symbol values selected from the group (+1, −1).
  • 15. The apparatus of claim 11, wherein M=3, and wherein each PAM-M codeword has symbol values selected from the group (+1, 0, −1).
  • 16. The apparatus of claim 11, wherein the transformation matrix is a Hadamard matrix.
  • 17. The apparatus of claim 10, wherein the codebook comprises at least two constrained-alphabet codes.
  • 18. The apparatus of claim 17, wherein the codebook encoder is further configured to select a constrained-alphabet code at system initialization.
Parent Case Info

This application is a continuation of U.S. application Ser. No. 14/711,528, filed May 13, 2015, entitled “VECTOR SIGNALING CODE WITH IMPROVED NOISE MARGIN”, which claims the benefit of U.S. Provisional Patent Application 61/992,711, filed May 13, 2014, entitled “Vector Signaling Code with Improved Noise Margin” all of which are herein incorporated by reference in their entireties for all purposes.

US Referenced Citations (446)
Number Name Date Kind
668687 Mayer Feb 1901 A
780883 Hinchman Jan 1905 A
3196351 Slepian Jul 1965 A
3636463 Ongkiehong Jan 1972 A
3939468 Mastin Feb 1976 A
4163258 Ebihara Jul 1979 A
4181967 Nash Jan 1980 A
4206316 Burnsweig Jun 1980 A
4276543 Miller Jun 1981 A
4486739 Franaszek Dec 1984 A
4499550 Ray, III Feb 1985 A
4722084 Morton Jan 1988 A
4772845 Scott Sep 1988 A
4774498 Traa Sep 1988 A
4864303 Ofek Sep 1989 A
4897657 Brubaker Jan 1990 A
4974211 Corl Nov 1990 A
5017924 Guiberteau May 1991 A
5053974 Penz Oct 1991 A
5150384 Cahill Sep 1992 A
5166956 Baltus Nov 1992 A
5168509 Nakamura Dec 1992 A
5266907 Dacus Nov 1993 A
5283761 Gillingham Feb 1994 A
5287305 Yoshida Feb 1994 A
5311516 Kuznicki May 1994 A
5331320 Cideciyan Jul 1994 A
5412689 Chan May 1995 A
5449895 Hecht Sep 1995 A
5459465 Kagey Oct 1995 A
5461379 Weinman Oct 1995 A
5510736 Van De Plassche Apr 1996 A
5511119 Lechleider Apr 1996 A
5553097 Dagher Sep 1996 A
5566193 Cloonan Oct 1996 A
5599550 Kohlruss Feb 1997 A
5626651 Dullien May 1997 A
5629651 Mizuno May 1997 A
5659353 Kostreski Aug 1997 A
5727006 Dreyer Mar 1998 A
5748948 Yu May 1998 A
5802356 Gaskins Sep 1998 A
5825808 Hershey Oct 1998 A
5856935 Moy Jan 1999 A
5875202 Venters Feb 1999 A
5945935 Kusumoto Aug 1999 A
5949060 Schattschneider Sep 1999 A
5982954 Delen Nov 1999 A
5995016 Perino Nov 1999 A
5999016 McClintock Dec 1999 A
6005895 Perino Dec 1999 A
6084883 Norrell Jul 2000 A
6119263 Mowbray Sep 2000 A
6154498 Dabral Nov 2000 A
6172634 Leonowich Jan 2001 B1
6175230 Hamblin Jan 2001 B1
6232908 Nakaigawa May 2001 B1
6278740 Nordyke Aug 2001 B1
6316987 Dally Nov 2001 B1
6317465 Akamatsu Nov 2001 B1
6346907 Dacy Feb 2002 B1
6359931 Perino Mar 2002 B1
6378073 Davis Apr 2002 B1
6384758 Michalski May 2002 B1
6398359 Silverbrook Jun 2002 B1
6404820 Postol Jun 2002 B1
6417737 Moloudi Jul 2002 B1
6424630 Ang Jul 2002 B1
6433800 Holtz Aug 2002 B1
6452420 Wong Sep 2002 B1
6473877 Sharma Oct 2002 B1
6483828 Balachandran Nov 2002 B1
6504875 Perino Jan 2003 B2
6509773 Buchwald Jan 2003 B2
6522699 Anderson Feb 2003 B1
6556628 Poulton Apr 2003 B1
6563382 Yang May 2003 B1
6621427 Greenstreet Sep 2003 B2
6624699 Yin Sep 2003 B2
6650638 Walker Nov 2003 B1
6661355 Cornelius Dec 2003 B2
6664355 Kim Dec 2003 B2
6686879 Shattil Feb 2004 B2
6690739 Mui Feb 2004 B1
6766342 Kechriotis Jul 2004 B2
6772351 Werner Aug 2004 B1
6839429 Gaikwad Jan 2005 B1
6839587 Yonce Jan 2005 B2
6854030 Perino Feb 2005 B2
6865234 Agazzi Mar 2005 B1
6865236 Terry Mar 2005 B1
6876317 Sankaran Apr 2005 B2
6898724 Chang May 2005 B2
6927709 Kiehl Aug 2005 B2
6954492 Williams Oct 2005 B1
6963622 Eroz Nov 2005 B2
6972701 Jansson Dec 2005 B2
6973613 Cypher Dec 2005 B2
6976194 Cypher Dec 2005 B2
6982954 Dhong Jan 2006 B2
6990138 Bejjani Jan 2006 B2
6991038 Guesnon Jan 2006 B2
6993311 Li Jan 2006 B2
6999516 Rajan Feb 2006 B1
7023817 Kuffner Apr 2006 B2
7038486 Aoyama May 2006 B2
7039136 Olson May 2006 B2
7053802 Cornelius May 2006 B2
7075996 Simon Jul 2006 B2
7080288 Ferraiolo Jul 2006 B2
7082557 Schauer Jul 2006 B2
7085153 Ferrant Aug 2006 B2
7085336 Lee Aug 2006 B2
7127003 Rajan Oct 2006 B2
7130944 Perino Oct 2006 B2
7142612 Horowitz Nov 2006 B2
7142865 Tsai Nov 2006 B2
7164631 Tateishi Jan 2007 B2
7167019 Broyde Jan 2007 B2
7176823 Zabroda Feb 2007 B2
7180949 Kleveland Feb 2007 B2
7184483 Rajan Feb 2007 B2
7199728 Dally Apr 2007 B2
7231558 Gentieu Jun 2007 B2
7269130 Pitio Sep 2007 B2
7269212 Chau Sep 2007 B1
7335976 Chen Feb 2008 B2
7336112 Sha Feb 2008 B1
7339990 Hidaka Mar 2008 B2
7346819 Bansal Mar 2008 B2
7348989 Stevens Mar 2008 B2
7349484 Stojanovic Mar 2008 B2
7356213 Cunningham Apr 2008 B1
7358869 Chiarulli Apr 2008 B1
7362130 Broyde Apr 2008 B2
7362697 Becker Apr 2008 B2
7366942 Lee Apr 2008 B2
7370264 Worley May 2008 B2
7372390 Yamada May 2008 B2
7389333 Moore Jun 2008 B2
7397302 Bardsley Jul 2008 B2
7400276 Sotiriadis Jul 2008 B1
7428273 Foster Sep 2008 B2
7456778 Werner Nov 2008 B2
7462956 Lan Dec 2008 B2
7496162 Srebranig Feb 2009 B2
7570704 Nagarajan Apr 2009 B2
7535957 Ozawa May 2009 B2
7539532 Tran May 2009 B2
7583209 Duan Sep 2009 B1
7599390 Pamarti Oct 2009 B2
7613234 Raghavan Nov 2009 B2
7616075 Kushiyama Nov 2009 B2
7620116 Bessios Nov 2009 B2
7633850 Nagarajan Dec 2009 B2
7639596 Cioffi Dec 2009 B2
7643588 Visalli Jan 2010 B2
7650525 Chang Jan 2010 B1
7656321 Wang Feb 2010 B2
7694204 Schmidt Apr 2010 B2
7697915 Behzad Apr 2010 B2
7698088 Sul Apr 2010 B2
7706456 Laroia Apr 2010 B2
7706524 Zerbe Apr 2010 B2
7746764 Rawlins Jun 2010 B2
7768312 Hirose Aug 2010 B2
7787572 Scharf Aug 2010 B2
7804361 Lim Sep 2010 B2
7808456 Chen Oct 2010 B2
7808883 Green Oct 2010 B2
7826551 Lee Nov 2010 B2
7841909 Murray Nov 2010 B2
7859356 Pandey Dec 2010 B2
7868790 Bae Jan 2011 B2
7869497 Benvenuto Jan 2011 B2
7869546 Tsai Jan 2011 B2
7882413 Chen Feb 2011 B2
7899653 Hollis Mar 2011 B2
7907676 Stojanovic Mar 2011 B2
7933770 Kruger Apr 2011 B2
8000664 Khorram Aug 2011 B2
8030999 Chatterjee Oct 2011 B2
8036300 Evans Oct 2011 B2
8050332 Chung Nov 2011 B2
8055095 Palotai Nov 2011 B2
8064535 Wiley Nov 2011 B2
8085172 Li Dec 2011 B2
8091006 Prasad Jan 2012 B2
8106806 Toyomura Jan 2012 B2
8149906 Saito Apr 2012 B2
8159375 Abbasfar Apr 2012 B2
8159376 Abbasfar Apr 2012 B2
8180931 Lee May 2012 B2
8185807 Oh May 2012 B2
8199849 Oh Jun 2012 B2
8199863 Chen Jun 2012 B2
8218670 Abou Rjeily Jul 2012 B2
8233544 Bao Jul 2012 B2
8245094 Jiang Aug 2012 B2
8245102 Cory Aug 2012 B1
8253454 Lin Aug 2012 B2
8279094 Abbasfar Oct 2012 B2
8279976 Lin Oct 2012 B2
8284848 Nam Oct 2012 B2
8289914 Li Oct 2012 B2
8295250 Gorokhov Oct 2012 B2
8295336 Lutz Oct 2012 B2
8305247 Pun Nov 2012 B2
8310389 Chui Nov 2012 B1
8341492 Shen Dec 2012 B2
8359445 Ware Jan 2013 B2
8365035 Hara Jan 2013 B2
8406315 Tsai Mar 2013 B2
8406316 Sugita Mar 2013 B2
8429492 Yoon Apr 2013 B2
8429495 Przybylski Apr 2013 B2
8437440 Zhang May 2013 B1
8442099 Sederat May 2013 B1
8442210 Zerbe May 2013 B2
8443223 Abbasfar May 2013 B2
8451913 Oh May 2013 B2
8462891 Kizer Jun 2013 B2
8472513 Malipatil Jun 2013 B2
8620166 Dong Jun 2013 B2
8498344 Wilson Jul 2013 B2
8498368 Husted Jul 2013 B1
8520348 Dong Aug 2013 B2
8520493 Goulahsen Aug 2013 B2
8539318 Cronie Sep 2013 B2
8547272 Nestler Oct 2013 B2
8577284 Seo Nov 2013 B2
8578246 Mittelholzer Nov 2013 B2
8588254 Diab Nov 2013 B2
8588280 Oh Nov 2013 B2
8593305 Tajalli Nov 2013 B1
8602643 Gardiner Dec 2013 B2
8604879 Mourant Dec 2013 B2
8638241 Sudhakaran Jan 2014 B2
8643437 Chiu Feb 2014 B2
8649445 Cronie Feb 2014 B2
8649460 Ware Feb 2014 B2
8649556 Wedge Feb 2014 B2
8649840 Sheppard, Jr. Feb 2014 B2
8674861 Matsuno Mar 2014 B2
8687968 Nosaka Apr 2014 B2
8711919 Kumar Apr 2014 B2
8718184 Cronie May 2014 B1
8755426 Cronie Jun 2014 B1
8773964 Hsueh Jul 2014 B2
8780687 Clausen Jul 2014 B2
8782578 Tell Jul 2014 B2
8831440 Yu Sep 2014 B2
8841936 Nakamura Sep 2014 B2
8879660 Peng Nov 2014 B1
8897134 Kern Nov 2014 B2
8898504 Baumgartner Nov 2014 B2
8938171 Tang Jan 2015 B2
8949693 Ordentlich Feb 2015 B2
8951072 Hashim Feb 2015 B2
8975948 Gonzalez Diaz Mar 2015 B2
8989317 Holden Mar 2015 B1
8996740 Wiley Mar 2015 B2
9015566 Cronie Apr 2015 B2
9020049 Schwager Apr 2015 B2
9036764 Hossain May 2015 B1
9059816 Simpson Jun 2015 B1
9069995 Cronie Jun 2015 B1
9077386 Holden Jul 2015 B1
9083576 Hormati Jul 2015 B1
9093791 Liang Jul 2015 B2
9100232 Hormati Aug 2015 B1
9106465 Walter Aug 2015 B2
9124557 Fox Sep 2015 B2
9148087 Tajalli Sep 2015 B1
9152495 Losh Oct 2015 B2
9165615 Amirkhany Oct 2015 B2
9172412 Kim Oct 2015 B2
9178503 Hsieh Nov 2015 B2
9183085 Northcott Nov 2015 B1
9197470 Okunev Nov 2015 B2
9231790 Wiley Jan 2016 B2
9281785 Sjoland Mar 2016 B2
9288082 Ulrich Mar 2016 B1
9288089 Cronie Mar 2016 B2
9292716 Winoto Mar 2016 B2
9300503 Holden Mar 2016 B1
9306621 Zhang Apr 2016 B2
9331962 Lida May 2016 B2
9362974 Fox Jun 2016 B2
9363114 Shokrollahi Jun 2016 B2
9374250 Musah Jun 2016 B1
9401828 Cronie Jul 2016 B2
9432082 Ulrich Aug 2016 B2
9432298 Smith Aug 2016 B1
9444654 Hormati Sep 2016 B2
9455744 George Sep 2016 B2
9455765 Schumacher Sep 2016 B2
9461862 Holden Oct 2016 B2
9479369 Shokrollahi Oct 2016 B1
9509437 Shokrollahi Nov 2016 B2
9537644 Jones Jan 2017 B2
9544015 Ulrich Jan 2017 B2
9634797 Benammar Apr 2017 B2
9667379 Cronie May 2017 B2
9710412 Sengoku Jul 2017 B2
20020044316 Myers Apr 2002 A1
20020057592 Robb May 2002 A1
20020097791 Hansen Jul 2002 A1
20020152340 Dreps Oct 2002 A1
20020154633 Shin Oct 2002 A1
20020167339 Chang Nov 2002 A1
20020174373 Chang Nov 2002 A1
20020181607 Izumi Dec 2002 A1
20030016763 Doi Jan 2003 A1
20030016770 Trans Jan 2003 A1
20030046618 Collins Mar 2003 A1
20030085763 Schrodinger May 2003 A1
20030117184 Fecteau Jun 2003 A1
20030146783 Bandy Aug 2003 A1
20030174023 Miyasita Sep 2003 A1
20030185310 Ketchum Oct 2003 A1
20030218558 Mulder Nov 2003 A1
20040027185 Fiedler Feb 2004 A1
20040057525 Rajan Mar 2004 A1
20040146117 Subramaniam Jul 2004 A1
20040155802 Lamy Aug 2004 A1
20040161019 Raghavan Aug 2004 A1
20040169529 Afghahi Sep 2004 A1
20040239374 Hori Dec 2004 A1
20050134380 Nairn Jun 2005 A1
20050174841 Ho Aug 2005 A1
20050195000 Parker Sep 2005 A1
20050201491 Wei Sep 2005 A1
20050213686 Love Sep 2005 A1
20050220182 Kuwata Oct 2005 A1
20050270098 Zhang Dec 2005 A1
20060013331 Choi Jan 2006 A1
20060036668 Jaussi Feb 2006 A1
20060097786 Su May 2006 A1
20060103463 Lee May 2006 A1
20060126751 Bessios Jun 2006 A1
20060140324 Casper Jun 2006 A1
20060159005 Rawlins Jul 2006 A1
20060233291 Garlepp Oct 2006 A1
20070001723 Lin Jan 2007 A1
20070002954 Cornelius Jan 2007 A1
20070030796 Green Feb 2007 A1
20070103338 Teo May 2007 A1
20070164883 Furtner Jul 2007 A1
20070182487 Ozasa Aug 2007 A1
20070201546 Lee Aug 2007 A1
20070204205 Niu Aug 2007 A1
20070263711 Kramer Nov 2007 A1
20070283210 Prasad Dec 2007 A1
20080007367 Kim Jan 2008 A1
20080012598 Mayer Jan 2008 A1
20080016432 Lablans Jan 2008 A1
20080104374 Mohamed May 2008 A1
20080159448 Anim-Appiah Jul 2008 A1
20080192621 Suehiro Aug 2008 A1
20080317188 Staszewski Dec 2008 A1
20090046009 Fujii Feb 2009 A1
20090059782 Cole Mar 2009 A1
20090115523 Akizuki May 2009 A1
20090150754 Dohmen Jun 2009 A1
20090195281 Tamura Aug 2009 A1
20090262876 Arima Oct 2009 A1
20090316730 Feng Dec 2009 A1
20090323864 Tired Dec 2009 A1
20100046644 Mazet Feb 2010 A1
20100081451 Mueck Apr 2010 A1
20100148819 Bae Jun 2010 A1
20100180143 Ware Jul 2010 A1
20100215112 Tsai Aug 2010 A1
20100215118 Ware Aug 2010 A1
20100235673 Abbasfar Sep 2010 A1
20100271107 Tran Oct 2010 A1
20100283894 Horan Nov 2010 A1
20100296556 Rave Nov 2010 A1
20100309964 Oh Dec 2010 A1
20110028089 Komori Feb 2011 A1
20110032977 Hsiao Feb 2011 A1
20110051854 Kizer Mar 2011 A1
20110072330 Kolze Mar 2011 A1
20110074488 Broyde Mar 2011 A1
20110084737 Oh Apr 2011 A1
20110103508 Mu May 2011 A1
20110127990 Wilson Jun 2011 A1
20110228864 Aryanfar Sep 2011 A1
20110235501 Goulahsen Sep 2011 A1
20110268225 Cronie Nov 2011 A1
20110286497 Nervig Nov 2011 A1
20110299555 Cronie Dec 2011 A1
20110302478 Cronie Dec 2011 A1
20110317559 Kern Dec 2011 A1
20120036415 Shafrir Feb 2012 A1
20120082203 Zerbe Apr 2012 A1
20120133438 Tsuchi May 2012 A1
20120152901 Nagorny Jun 2012 A1
20120161945 Single Jun 2012 A1
20120213299 Cronie Aug 2012 A1
20130010892 Cronie Jan 2013 A1
20130013870 Cronie Jan 2013 A1
20130106513 Cyrusian May 2013 A1
20130114392 Sun et al. May 2013 A1
20130114519 Gaal May 2013 A1
20130114663 Ding May 2013 A1
20130129019 Sorrells May 2013 A1
20130147553 Iwamoto Jun 2013 A1
20130159584 Nygren Jun 2013 A1
20130188656 Ferraiolo Jul 2013 A1
20130195155 Pan Aug 2013 A1
20130202065 Chmelar Aug 2013 A1
20130215954 Beukema Aug 2013 A1
20130259113 Kumar Oct 2013 A1
20130271194 Pellerano Oct 2013 A1
20130307614 Dai Nov 2013 A1
20130314142 Tamura Nov 2013 A1
20130315501 Atanassov Nov 2013 A1
20130346830 Ordentlich Dec 2013 A1
20140068391 Goel Mar 2014 A1
20140159769 Hong Jun 2014 A1
20140177645 Cronie Jun 2014 A1
20140177696 Hwang Jun 2014 A1
20140254642 Fox Sep 2014 A1
20140266440 Itagaki Sep 2014 A1
20140269130 Maeng Sep 2014 A1
20150049798 Hossein Feb 2015 A1
20150070201 Dedic Mar 2015 A1
20150078479 Whitby-Strevens Mar 2015 A1
20150146771 Walter May 2015 A1
20150222458 Hormati Aug 2015 A1
20150236885 Ling Aug 2015 A1
20150249559 Shokrollahi Sep 2015 A1
20150333940 Shokrollahi Nov 2015 A1
20150349835 Fox Dec 2015 A1
20150380087 Mittelholzer Dec 2015 A1
20150381232 Ulrich Dec 2015 A1
20160020796 Hormati Jan 2016 A1
20160020824 Ulrich Jan 2016 A1
20160036616 Holden Feb 2016 A1
20160197747 Ulrich Jul 2016 A1
20160261435 Musah Sep 2016 A1
20170310456 Tajalli Oct 2017 A1
20170317449 Shokrollahi Nov 2017 A1
20170317855 Shokrollahi Nov 2017 A1
Foreign Referenced Citations (11)
Number Date Country
1864346 Nov 2006 CN
101478286 Jul 2009 CN
101820288 Sep 2010 CN
101854223 Oct 2010 CN
1926267 May 2008 EP
2039221 Feb 2013 EP
2003163612 Jun 2003 JP
2005002162 Jan 2005 WO
2009084121 Jul 2009 WO
2010031824 Mar 2010 WO
2011119359 Sep 2011 WO
Non-Patent Literature Citations (49)
Entry
“Introduction to: Analog Computers and the DSPACE System,” Course Material ECE 5230 Spring 2008, Utah State University, www.coursehero.com, 12 pages.
Abbasfar, A., “Generalized Differential Vector Signaling”, IEEE International Conference on Communications, ICC '09, (Jun. 14, 2009), pp. 1-5.
Brown, L., et al., “V.92: The Last Dial-Up Modem?”, IEEE Transactions on Communications, IEEE Service Center, Piscataway, NJ., USA, vol. 52, No. 1, Jan. 1, 2004, pp. 54-61. XP011106836, ISSN: 0090-6779, DOI: 10.1109/tcomm.2003.822168, pp. 55-59.
Burr, “Spherical Codes for M-ARY Code Shift Keying”, University of York, Apr. 2, 1989, pp. 67-72, United Kingdom.
Cheng, W., “Memory Bus Encoding for Low Power: A Tutorial”, Quality Electronic Design, IEEE, International Symposium on Mar. 26-28, 2001, pp. 199-204, Piscataway, NJ.
Clayton, P., “Introduction to Electromagnetic Compatibility”, Wiley-Interscience, 2006.
Counts, L., et al., “One-Chip Slide Rule Works with Logs, Antilogs for Real-Time Processing,” Analog Devices Computational Products 6, Reprinted from Electronic Design, May 2, 1985, 7 pages.
Dasilva et al., “Multicarrier Orthogonal CDMA Signals for Quasi-Synchronous Communication Systems”, IEEE Journal on Selected Areas in Communications, vol. 12, No. 5 (Jun. 1, 1994), pp. 842-852.
Design Brief 208 Using the Anadigm Multiplier CAM, Copyright 2002 Anadigm, 6 pages.
Ericson, T., et al., “Spherical Codes Generated by Binary Partitions of Symmetric Pointsets”, IEEE Transactions on Information Theory, vol. 41, No. 1, Jan. 1995, pp. 107-129.
Farzan, K., et al., “Coding Schemes for Chip-to-Chip Interconnect Applications”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 14, No. 4, Apr. 2006, pp. 393-406.
Grahame, J., “Vintage Analog Computer Kits,” posted on Aug. 25, 2006 in Classic Computing, 2 pages, http.//www.retrothing.com/2006/08/classic_analog_.html.
Healey, A., et al., “A Comparison of 25 Gbps NRZ & PAM-4 Modulation used in Legacy & Premium Backplane Channels”, DesignCon 2012, 16 pages.
International Search Report and Written Opinion for PCT/EP2011/059279 dated Sep. 22, 2011.
International Search Report and Written Opinion for PCT/EP2011/074219 dated Jul. 4, 2012.
International Search Report and Written Opinion for PCT/EP2012/052767 dated May 11, 2012.
International Search Report and Written Opinion for PCT/US14/052986 dated Nov. 24, 2014.
International Search Report and Written Opinion from PCT/US2014/034220 dated Aug. 21, 2014.
International Search Report and Written Opinion of the International Searching Authority, dated Jul. 14, 2011 in International Patent Application S.N. PCT/EP2011/002170, 10 pages.
International Search Report and Written Opinion of the International Searching Authority, dated Nov. 5, 2012, in International Patent Application S.N. PCT/EP2012/052767, 7 pages.
International Search Report for PCT/US2014/053563, dated Nov. 11, 2014, 2 pages.
Jiang, A., et al., “Rank Modulation for Flash Memories”, IEEE Transactions of Information Theory, Jun. 2006, vol. 55, No. 6, pp. 2659-2673.
Loh, M., et al., “A 3×9 Gb/s Shared, All-Digital CDR for High-Speed, High-Density I/O”, Matthew Loh, IEEE Journal of Solid-State Circuits, Vo. 47, No. 3, Mar. 2012.
Notification of Transmittal of International Search Report and The Written Opinion of the International Searching Authority, for PCT/US2015/018363, dated Jun. 18, 2015, 13 pages.
Notification of Transmittal of the International Search Report and The Written Opinion of the International Searching Authority, or The Declaration for PCT/EP2013/002681, dated Feb. 25, 2014, 15 pages.
Notification of Transmittal of the International Search Report and The Written Opinion of the International Searching Authority, or the Declaration, dated Feb. 15, 2017, 10 pages.
Notification of Transmittal of The International Search Report and The Written Opinion of the International Searching Authority, or The Declaration, dated Mar. 3, 2015, for PCT/US2014/066893, 9 pages.
Notification of Transmittal of The International Search Report and The Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2014/015840, dated May 20, 2014. 11 pages.
Notification of Transmittal of The International Search Report and The Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2014/043965, dated Oct. 22, 2014, 10 pages.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2015/037466, dated Nov. 19, 2015.
Notification of Transmittal of the International Search Report and The Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2015/039952, dated Sep. 23, 2015, 8 pages.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2015/041161, dated Oct. 7, 2015, 8 pages.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration, for PCT/US2015/043463, dated Oct. 16, 2015, 8 pages.
Oh, et al., Pseudo-Differential Vector Signaling for Noise Reduction in Single-Ended Signaling, DesignCon 2009.
Poulton, et al., “Multiwire Differential Signaling”, UNC-CH Department of Computer Science Version 1.1, Aug. 6, 2003.
Schneider, J., et al., “ELEC301 Project: Building an Analog Computer,” Dec. 19, 1999, 8 pages, http://www.clear.rice.edu/elec301/Projects99/anlgcomp/.
She et al., “A Framework of Cross-Layer Superposition Coded Multicast for Robust IPTV Services over WiMAX,” IEEE Communications Society subject matter experts for publication in the WCNC 2008 proceedings, Mar. 31, 2008-Apr. 3, 2008, pp. 3139-3144.
Skliar et al., A Method for the Analysis of Signals: the Square-Wave Method, Mar. 2008, Revista de Matematica: Teoria y Aplicationes, pp. 109-129.
Slepian, D., “Premutation Modulation”, IEEE, vol. 52, No. 3, Mar. 1965, pp. 228-236.
Stan, M., et al., “Bus-Invert Coding for Low-Power I/O, IEEE Transactions on Very Large Scale Integration (VLSI) Systems”, vol. 3, No. 1, Mar. 1995, pp. 49-58.
Tallini, L., et al., “Transmission Time Analysis for the Parallel Asynchronous Communication Scheme”, IEEE Transactions on Computers, vol. 52, No. 5, May 2003, pp. 558-571.
Tierney, J., et al., “A digital frequency synthesizer,” Audio and Electroacoustics, IEEE Transactions, Mar. 1971, pp. 48-57, vol. 19, Issue 1, 1 page Abstract from http://ieeexplore.
Wang et al., “Applying CDMA Technique to Network-on-Chip”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 15, No. 10 (Oct. 1, 2007), pp. 1091-1100.
Zouhair Ben-Neticha et al, “The streTched-Golay and other codes for high-SNR fnite-delay quantization of the Gaussian source at 1/2 Bit per sample”, IEEE Transactions on Communications, vol. 38, No. 12 Dec. 1, 1990, pp. 2089-2093, XP000203339, ISSN: 0090-6678, DOI: 10.1109/26.64647.
Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration., for PCT/US17/14997, dated Apr. 7, 2017.
Holden, B., “Simulation results for NRZ, ENRZ & PAM-4 on 16-wire full-sized 400GE backplanes”, IEEE 802.3 400GE Study Group, Sep. 2, 2013, 19 pages, www.ieee802.0rg/3/400GSG/publiv/13_09/holden_400_01_0913.pdf.
Holden, B., “An exploration of the technical feasibility of the major technology options for 400GE backplanes”, IEEE 802.3 400GE Study Group, Jul. 16, 2013, 18 pages, http://ieee802.org/3/400GSG/public/13_07/holden_400_01_0713.pdf.
Holden, B., “Using Ensemble NRZ Coding for 400GE Electrical Interfaces”, IEEE 802.3 400GE Study Group, May 17, 2013, 24 pages, http://www.ieee802.org/3/400GSG/public/13_05/holden_400_01_0513.pdf.
Giovaneli, et al., “Space-frequency coded OFDM system for multi-wire power line communications”, Power Line Communications and Its Applications, 20015 International Symposium on Vancouver, BC, Canada, Apr. 6-8, 2005, Piscataway, NJ, pp. 191-195.
Related Publications (1)
Number Date Country
20170078122 A1 Mar 2017 US
Provisional Applications (1)
Number Date Country
61992711 May 2014 US
Continuations (1)
Number Date Country
Parent 14711528 May 2015 US
Child 15363197 US