Voltage random access memory (VRAM)

Abstract
An integrated circuit memory cell and voltage ladder design that adapts techniques typically applied to Static Random Access Memory (SRAM) circuits to implement a compact array of analog Voltage Random Access Memory (VRAM) locations. The memory cells in the VRAM each store a digital value that controls a corresponding switch. The switch couple a particular voltage from a set of voltages generated by the ladder, to be output when that location is enabled. Multiple analog output voltages are provided by simply providing additional rows of cells.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.



FIG. 1 is a block diagram of a circuit function, such as a charge to digital converter, that may use a Voltage Random Access Memory (VRAM) according to the present invention.



FIG. 2A and FIG. 2B show a prior art arrangement for a Static Random Access Memory (SRAM).



FIG. 3 shows an array of VRAM cells and a resistor ladder arranged according to the present invention.



FIG. 4 is a more detailed view of a VRAM cell, showing the memory bit storage circuit and the associated switch.



FIG. 5 shows one specific possible arrangement for the resistor ladder of FIG. 3 with both coarse and fine step resistors.



FIG. 6 is a chart listing the output voltages that can be selected with the resistor ladder of FIG. 5.



FIG. 7 illustrates another implementation of a VRAM cell providing a coarse and fine output voltage, to increase output resolution and improve noise immunity.



FIG. 8 is a VRAM receiver, that may be scattered throughout an IC design, that uses a difference amplifier to produce and output voltage that is proportional to a difference between a coarse voltage and a fine voltage.


Claims
  • 1. A method for storing a digital value in a memory location and causing a particular analog voltage to be output when that location is accessed, comprising providing, via a resistor ladder network coupled to at least one voltage reference, a plurality of analog reference voltages at a plurality of nodes therein; andoperating a compact array of a plurality of cells, each cell containing a storage device and a corresponding analog reference voltage switch, so that each storage device controls the state of the analog reference voltage located in the corresponding cell, andcoupling each such switch between a node in the resistor ladder network corresponding to a pre-selected one of the analog reference voltages, and an analog voltage output point.
  • 2. A method as in claim 1 wherein the resistor ladder network is further for: connecting a first set of resistors connected in series to provide the set of reference analog voltages.
  • 3. A method as in claim 2 additionally comprising connecting additional resistors arranged in parallel with one or more of the resistors in the first set to provide one or more fine reference analog voltages.
  • 4. A method as in claim 1 wherein the storage device in at least one cell is for storing a single digital bit.
  • 5. A method as in claim 4 wherein the storage device is a pair of cross coupled inverter gates.
  • 6. A method as in claim 1 wherein multiple cells are connected to the same node in the resistor ladder network so as to be available to produce multiple analog output voltages.
  • 7. A method as in claim 1 wherein each storage device in the array of cells is addressable.
  • 8. A method as in claim 7 wherein each storage device in the array of cells is addressable by row and column decoders.
  • 9. A method as in claim 1 additionally comprising: storing, in a first cell, digital information to produce a coarse analog voltage;storing, in a second cell, digital information to produce a fine analog voltage; andproducing, via a difference amplifier connected to receive the coarse analog voltage and the fine analog voltage, the analog output as a voltage or current proportional to a difference there between.
  • 10. A method as in claim 1 additionally comprising the step of providing a plurality of reference voltages in a charge to digital converter.
Provisional Applications (1)
Number Date Country
60585610 Jul 2004 US
Continuation in Parts (1)
Number Date Country
Parent PCT/US05/24137 Jul 2005 US
Child 11649704 US