BRIEF DESCRIPTION OF THE DRAWINGS
The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention, as illustrated in the accompanying drawings in which like reference characters refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention.
FIG. 1 is a block diagram of a circuit function, such as a charge to digital converter, that may use a Voltage Random Access Memory (VRAM) according to the present invention.
FIG. 2A and FIG. 2B show a prior art arrangement for a Static Random Access Memory (SRAM).
FIG. 3 shows an array of VRAM cells and a resistor ladder arranged according to the present invention.
FIG. 4 is a more detailed view of a VRAM cell, showing the memory bit storage circuit and the associated switch.
FIG. 5 shows one specific possible arrangement for the resistor ladder of FIG. 3 with both coarse and fine step resistors.
FIG. 6 is a chart listing the output voltages that can be selected with the resistor ladder of FIG. 5.
FIG. 7 illustrates another implementation of a VRAM cell providing a coarse and fine output voltage, to increase output resolution and improve noise immunity.
FIG. 8 is a VRAM receiver, that may be scattered throughout an IC design, that uses a difference amplifier to produce and output voltage that is proportional to a difference between a coarse voltage and a fine voltage.