The semiconductor manufacturing industry has achieved remarkable success in reducing manufacturing costs. As a result, the cost of most electronic products continues to drop, even as these products provide ever greater capabilities and value. In the past, some of the lower manufacturing costs have been achieved by running large lots of wafers in large batch processing machines. However, the semiconductor manufacturing industry is now tending to move away from batch processing and toward single wafer processing. Consequently, techniques for speeding up single wafer processing are needed.
A significant productivity challenge in semiconductor device manufacturing is process waiting time. For every minute that a micro-electronic substrate or wafer undergoes processing, the wafer may be completely idle for 20-30 minutes or more, while waiting for the next process to begin. Cycle-time is the total time required for a wafer to move through the entire manufacturing process. Reducing cycle time can allow device manufacturers flexibility to adapt product type to rapidly changing market demands. Wafer lot size is the size of the lot or batch of wafers moving as a group through the manufacturing processes. Currently, a common wafer lot size is 25, i.e., the wafers move through the manufacturing facility or fab in groups of 25 (typically within a carrier capable of holding up to 25 wafers). At each tool or station, the carrier must wait until the entire lot of e.g., 25 wafers is processed. If, on the other hand, the lot size is reduced to say 5 wafers, waiting time and cycle time can be significantly reduced. The overall inventory of wafers moving through the fab can also be reduced. Both of these factors reduce manufacturing costs.
Although reducing wafer lot sizes from 25 wafers per carrier to say five wafers per carrier may conceptually be a relatively simple transition, in the real world it creates difficult engineering challenges. Going from 25 to 5 wafers per carrier requires moving the same number of wafers through the fab, but using five times more individual carrier movements. Apart from simply moving carriers faster, other factors, such as carrier storage and waiting locations, carrier access, carrier movement patterns, carrier loading system speed, etc. can affect ultimate manufacturing costs.
In addition, even with current technology, when specific process times are relatively short, say for example, less than 2 or 3 minutes per wafer, the processing systems can often process wafers more quickly than the wafer transport systems in the fab can deliver wafers to the processing systems, and/or more quickly than wafer loading systems can load or unload wafers. Consequently, the processing systems are often processing wafers at rates below their maximum processing capability. As a result, manufacturers are not able to achieve all of cost savings that such processing systems can offer.
Accordingly, improved systems and methods are needed.
A wafer loading system for loading and unloading wafers into and from various types of wafer processing systems accommodates sufficient wafer carriers to substantially maximize the processing speed capability of the processing system. The loading system also allows for operation with carriers having smaller numbers of wafers, to reduce waiting time during manufacturing. Wafer carriers are placed into and removed from the loading system by one or two overhead carrier loading elements, such as overhead tracks. Carriers may be loaded or removed while other carriers are in work. Larger numbers of carriers may also be simultaneously accessed. The wafer loading system may be used with existing processing systems, to increase manufacturing efficiency.
This summary is included to provide a brief overview of the invention. However, the features and advantages described here are not requirements or limitations on the invention, and should not be taken as such. Rather, the limitations of the invention are set forth in the claims.
In the drawings, wherein the same reference number indicates the same element in each of the views:
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The loading system may alternatively use two transfer robots. In this design, a first transfer robot typically moves wafers between docked FOUPs in columns 110 and 112 and the first buffer 158. A second transfer robot 154 similarly moves wafers between docked FOUPs in columns 114 and 116 and the second buffer 160. In this way, each transfer robot operates within in own dedicated space, with few, if any, interfering or overlapping transfer robot movements occurring. Conflict or collision avoidance control software is accordingly not needed, allowing the transfer robots to move more quickly.
The process module 166 shown in
After processing, the wafers are then returned to the first buffer 158 by the first process robot 172. The transfer robot 152 then moves the now processed wafers from the first buffer 158 back into a docked FOUP. Operation of the second side 164 is the same as, but independent of, the first section 162. As each section 162 and 164 of the process module 166 operates independently, the speed of operation of either section is independent of the other. In addition, either section may be idled, for example, for service or calibration, while the other section continues with normal processing operations. The processors 168 on each section 162 and 164 may share common process fluid supplies, electrical power supplies, and drain/exhaust connections (all typically provided underneath the deck holding the processors 168), or they may each have independent supplies or connections.
In the process module 166, although two process robots 172 and 174 are used, again, each of the process robots operates exclusively within its own space. Specifically, the first process robot 172 typically moves only between the first buffer 158 and the processors 168 on the first side 162, while the second process robot 174 correspondingly typically moves only between the second buffer 160 and the processors 168 on the second side 164. Conflict avoidance control software is therefore also not needed for controlling the process robots 172 and 174. This allows the process robots to operate more quickly. At the same time, the potential for wafer or robot damage caused by collisions resulting from the robots accessing the same spaces is greatly reduced. The process module 166 may alternatively be provided with a single process robot that accesses all processors in the module 166. In this design, no dividing wall is used.
The buffers provide temporary holding positions for the wafers. The generally wedge-shaped buffers allow the robots to pick up and place wafers in the buffers, relatively quickly and with relatively simple movements. Of course, other types of buffers having different forms and locations may be used. Indexing buffers having vertical movement may also be used. By moving the buffers (or rather the buffer shelves providing the wafer holding positions) vertically, buffer capacity may increase within a compact space. The amount of vertical robot movement may also be reduced, allowing the robots to pick and place wafers more quickly. Vertically indexing buffers may be implemented by supporting the buffers on actuators 140 shown in dotted lines in
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A docking actuator 254 then moves the FOUP incrementally further forward into a docked position at the docking opening 105 in the docking wall 106. A FOUP door remover 256 then removes the FOUP door from the FOUP and lowers it out of the way. These FOUP movements and events are typically carried out in each of the four FOUP columns 110, 112, 114, 116, simultaneously, or in as taggered manner.
A transfer robot (of any type used in the loading system) then moves wafers from the docked FOUP to a buffer. Wafers in the buffer are then moved into processors 168, are processed, and then returned to a buffer by a process robot (of any type used in the process module), as described above. The transfer robot then returns the processed wafers from the buffer to a FOUP. The FOUP door remover 256 replaces the door onto the FOUP. The docking actuator 254 then undocks the FOUP, by moving it away from the docking wall 106. The processing system controller then signals the second overhead FOUP transport track 262 to pick up the FOUP now holding processed wafers. The second overhead FOUP track 262 then engages and lifts the FOUP up off of the FOUP loader 252, at POS3, and carries it to the next station in the fab.
The lift actuator 252 then moves the loader 250 back down to POS2 at the height of the load deck 108, in preparation for receiving another FOUP. In general, the sequence described above is performed in the same way at each of the four FOUP columns 110, 112, 114 and 116, although the movements described are not necessarily performed simultaneously at each FOUP position. Rather, the shuttle actuator, FOUP loader, lift actuator, and door remover at each of the four FOUP positions may be controlled by the controller 62 for movement entirely independent of movement of these elements at any other FOUP position. Alternatively, these elements at each of the four FOUP columns which facilitate FOUP movement at each column may be controlled in ways that are fully or partially dependent on other factors, such as movement in other FOUP positions. For example, the controller 62 may be programmed so that all four FOUPS are moved in the same way, at the same time. Staggered FOUP movements may also be used. In addition, the FOUP movement pattern can be reversed, with FOUPs delivered to row BB by track 262, and removed from row AA by track 260.
The small movements performed in handing off the FOUP from the shuttle actuator to the FOUP loader, and in docking/undocking the FOUP, are not shown. For purpose of description, POS 2 includes the FOUPs horizontal position, regardless of whether the FOUP is supported by the shuttle actuator or the FOUP loader. Similarly, POS3 includes the FOUPs horizontal position regardless of whether the FOUP is docked or undocked. The vertical and horizontal movements between POS1, POS2 and POS3 (and indeed between all positions described) may be varied, and need not be straight line movements. Curving movements, and even diagonal movements may be used, although pure vertical and horizontal linear movements are generally simpler to implement.
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For process modules having larger numbers of processors, or with process modules running very short processes, additional FOUP columns may be added, with the loading system 100 then having 5, 6, 7 8 or more FOUP columns. In addition, although four FOUP columns are described, the loading system may also be configured with as few as 2 or 3 columns.
The wafers in the first FOUP F1 are then removed, processed and returned to FOUP F1, as described above, with the door remover 256 removing and replacing the door onto FOUP F1. The first FOUP loader 280 undocks the first FOUP F1. In the interim, the overhead loading track 260 has delivered a second FOUP F2 onto the second FOUP loader 282 at POS1. The first FOUP loader 280 moves FOUP F1 back down to POS2, while the second FOUP loader 282 moves the second FOUP F2 up from POS1 to POS1W.
The first FOUP loader 280 then moves rearward, carrying the first FOUP F1 from POS2 back to POS1 (to its original position). The second FOUP loader 282 moves the second FOUP F2 forward from POS2 to POS3, which is the wafer access position 274. The second FOUP loader 280 then docks the second FOUP F2. The door of FOUP F2 is removed and the wafers in FOUP F2 processed and returned, as described above relative to FOUP F1. FOUP F1, in the interim, is picked up by the overhead loading track 260 and moved to a subsequent processing or storage location within the fab facility. As described, FOUP F1 moves sequentially forward and then backward through positions POS1, POS2 and POS3. FOUP F2 moves sequentially forward and then back through positions POS1, POS1W and POS3. Of course, the sequence of FOUP movements may be reversed, with the first FOUP loader 280 moving up and then forward, and the second FOUP loader first moving down and then back. The FOUP movements described above and shown in
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While the first FOUP F1 is at the POS 3 wafer access position 274, or docked at a docking opening 105, the second overhead loading track 262 delivers a second FOUP F2 onto the upper plate 294 of the FOUP loader 292. This position, referred to here as the stack position, is labeled as POS3UP in
In each of the designs described above, processed wafers may be returned to their original FOUP, or they may be returned to a different FOUP, depending on the processing carried out, and other factors. In some fabs, the unprocessed wafers may be delivered to the loading system in a so-called “dirty” FOUP. After processing, the “clean” wafers are then returned to a different “clean” FOUP (referred to below as an auxiliary FOUP), typically docked at a docking opening 105 different from the docking opening at which the “dirty” FOUP was docked. The loading system 100 as described above may operate in this way, with the transfer robot(s) controlled to pick unprocessed wafers from one FOUP and return them after processing to a different FOUP. Similarly, the process robot(s) and/or the transfer robot(s) may handle both unprocessed and processed wafers using the same end effector, or using a different end effector. In particular, in some designs, unprocessed wafers may be handled only by dedicated unprocessed wafer end effectors, while processed wafers are handled only by dedicated processed wafer end effectors, to reduce potential for cross contamination.
As is apparent from the description above, the methods described may be performed using many different types of apparatus, as the methods are directed to the movements and sequences of events, and not to apparatus providing such movements and sequences of events. The specific elements described relative to
The number and type of buffers used may also be varied. In addition, in certain applications, buffers and transfer robots may be entirely omitted, with one or more process robots performing all wafer handling and movement. In some applications, the buffers may optionally be moved laterally, via lateral buffer actuators, along with, or in place of, vertically moving indexing buffers, or fixed buffers. The rows and columns described above generally relate to multiple aligned positions. However, it is readily apparent that one or more positions nominally in a row or column may be off set, or moved out of alignment, without affecting operation of the loading system. Accordingly, rows and columns, as used here, includes arrangements having one or more misaligned, joggled, or staggered positions.
The term work piece or wafer here means any flat article, including semiconductor wafers and other substrates, such as glass, mask, and optical or memory media, MEMS substrates or any other work piece having, or on which, micro-electronic, micro-mechanical, micro-electro-mechanical, or micro-optical devices, may be formed. The term “between” includes movement and/or placement at the ending points, e.g. a FOUP, a buffer or a processor. Although operations using FOUPs have been described, other types of containers or carriers may alternatively be used. Terms such as “forward”, “rearward”, “upper”, “lower”, and the like when used here refer to the positions of the respective elements shown in the drawing figures, although the invention is not necessarily limited to such positions or relationships. Indeed, the specific directions of movement described in the claims may of course be reversed, to perform clearly equivalent steps or methods. Similarly, terms such as “vertical”, “inwardly”, “outwardly”, “towards”, “away from”, and similar terms, as used here mean “in the general direction of”, and not limited to their geometric definitions. The terms “up” and “down” refer to the direction of gravity. The terms “above” and “below” indicate different vertical positions, and with the same or different horizontal positions. The term “aligned above” mean different vertical positions and the same horizontal position.
Thus, novel methods and apparatus have been shown and described. Various changes and substitutions of equivalents may of course be made, without departing from the spirit and scope of the invention. The invention, therefore, should not be limited, except to the following claims, and their equivalents.