Halo LSI, Inc.

Organization

Wapperings Falls, NY, US

Business Address
169 MYERS CORNERS ROAD SUITE 230 WAPPINGERS FALLS NY 12590 8452988828
State Location
NY
State of Incorporation

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
High density vertical structure nitride flash memory
- Patent number 9,153,592
- Issue date Oct 6, 2015
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary reference method for high reliability trap-type non-v...
- Patent number 9,123,419
- Issue date Sep 1, 2015
- Halo LSI, Inc.
- Nori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
High density vertical structure nitride flash memory
- Patent number 8,710,576
- Issue date Apr 29, 2014
- Halo LSI Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin MONOS array for high speed application
- Patent number 8,633,544
- Issue date Jan 21, 2014
- Halo LSI, Inc.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Grant
Complementary reference method for high reliability trap-type non-v...
- Patent number 8,325,542
- Issue date Dec 4, 2012
- Halo LSI Inc.
- Nori Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed operation method for twin MONOS metal bit array
- Patent number 8,174,885
- Issue date May 8, 2012
- Halo LSI Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Trap-charge non-volatile switch connector for programmable logic
- Patent number 8,139,410
- Issue date Mar 20, 2012
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Trap-charge non-volatile switch connector for programmable logic
- Patent number 8,089,809
- Issue date Jan 3, 2012
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Trap-charge non-volatile switch connector for programmable logic
- Patent number 8,027,198
- Issue date Sep 27, 2011
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Trap-charge non-volatile switch connector for programmable logic
- Patent number 8,023,326
- Issue date Sep 20, 2011
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed operation method for twin MONOS metal bit array
- Patent number 7,936,604
- Issue date May 3, 2011
- Halo LSI Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Referencing scheme for trap memory
- Patent number 7,447,077
- Issue date Nov 4, 2008
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,411,247
- Issue date Aug 12, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,394,703
- Issue date Jul 1, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,391,653
- Issue date Jun 24, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,382,662
- Issue date Jun 3, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,382,659
- Issue date Jun 3, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,359,250
- Issue date Apr 15, 2008
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin MONOS array for high speed application
- Patent number 7,352,033
- Issue date Apr 1, 2008
- Halo LSI Inc.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory dynamic operations
- Patent number 7,301,820
- Issue date Nov 27, 2007
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory array organization and usage
- Patent number 7,190,603
- Issue date Mar 13, 2007
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,170,132
- Issue date Jan 30, 2007
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Stitch and select implementation in twin MONOS array
- Patent number 7,118,961
- Issue date Oct 10, 2006
- Halo LSI, Inc.
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin insulator charge storage device operation and its fabrication...
- Patent number 7,046,556
- Issue date May 16, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast program to program verify method
- Patent number 7,046,553
- Issue date May 16, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile semiconductor memory and driving method
- Patent number 7,031,192
- Issue date Apr 18, 2006
- Halo LSI, Inc.
- Ki-Tae Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Array architecture and operation methods for a nonvolatile memory
- Patent number 7,006,378
- Issue date Feb 28, 2006
- Halo LSI, Inc.
- Tomoya Saito
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of sense and program verify without a reference cell for non...
- Patent number 6,999,345
- Issue date Feb 14, 2006
- Halo LSI, Inc.
- Ki-Tae Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Twin NAND device structure, array operations and fabrication method
- Patent number 6,998,658
- Issue date Feb 14, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
High efficiency triple well charge pump circuit
- Patent number 6,914,791
- Issue date Jul 5, 2005
- Halo LSI, Inc.
- Ki-Tae Park
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER

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Patents Applicationslast 30 patents

Information Patent Application
High Density Vertical Structure Nitride Flash Memory
- Publication number 20140219030
- Publication date Aug 7, 2014
- HALO LSI, INC.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS Array for High Speed Application
- Publication number 20140133245
- Publication date May 15, 2014
- HALO LSI, INC.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS Array for High Speed Application
- Publication number 20140133244
- Publication date May 15, 2014
- HALO LSI, INC.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Application
Complementary Reference Method for High Reliability Trap-Type Non-V...
- Publication number 20130094299
- Publication date Apr 18, 2013
- HALO LSI, INC.
- Nori Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Complementary Reference Method for High Reliability Trap-Type Non-V...
- Publication number 20130094303
- Publication date Apr 18, 2013
- HALO LSI, INC.
- Nori Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
High speed operation method for Twin MONOS metal bit array
- Publication number 20110205798
- Publication date Aug 25, 2011
- Halo LSI, Inc.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Complementary Reference method for high reliability trap-type non-v...
- Publication number 20100046302
- Publication date Feb 25, 2010
- Halo LSI, Inc.
- Nori Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Trench monos memory cell and array
- Publication number 20090251973
- Publication date Oct 8, 2009
- Halo LSI, Inc.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS array for high speed application
- Publication number 20080186763
- Publication date Aug 7, 2008
- Halo LSI, Inc.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Application
Continuous pressed laminates
- Publication number 20070193683
- Publication date Aug 23, 2007
- Halo LSI, Inc.
- Robert Huusken
- B32 - LAYERED PRODUCTS
Information Patent Application
High speed operation method for twin MONOS metal bit array
- Publication number 20070047307
- Publication date Mar 1, 2007
- HALO LSI INC.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS array for high speed application
- Publication number 20070047309
- Publication date Mar 1, 2007
- HALO LSI INC.
- Kimihiro Satoh
- G11 - INFORMATION STORAGE
Information Patent Application
Referencing scheme for trap memory
- Publication number 20070030745
- Publication date Feb 8, 2007
- HALO LSI INC.
- Tomoko Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060227622
- Publication date Oct 12, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060221706
- Publication date Oct 5, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060203562
- Publication date Sep 14, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20060187709
- Publication date Aug 24, 2006
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20050164451
- Publication date Jul 28, 2005
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin insulator charge storage device operation and its fabrication...
- Publication number 20050145928
- Publication date Jul 7, 2005
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Simplified twin monos fabrication method with three extra masks to...
- Publication number 20040219751
- Publication date Nov 4, 2004
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stitch and select implementation in twin MONOS array
- Publication number 20040166630
- Publication date Aug 26, 2004
- Halo LSI, Inc.
- Tomoko Ogura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Twin NAND device structure, array operations and fabrication method
- Publication number 20040092066
- Publication date May 13, 2004
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin NAND device structure, array operations and fabrication method
- Publication number 20040087087
- Publication date May 6, 2004
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Fast program to program verify method
- Publication number 20030185053
- Publication date Oct 2, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Twin MONOS cell fabrication method and array organization
- Publication number 20030143792
- Publication date Jul 31, 2003
- Halo LSI, Inc.
- Kimihiro Satoh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fast program to program verify method
- Publication number 20030128588
- Publication date Jul 10, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Fast program to program verify method
- Publication number 20030123291
- Publication date Jul 3, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Fast program to program verify method
- Publication number 20030123308
- Publication date Jul 3, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Fast program to program verify method
- Publication number 20030123292
- Publication date Jul 3, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Fast program to program verify method
- Publication number 20030123290
- Publication date Jul 3, 2003
- Halo LSI, Inc.
- Seiki Ogura
- G11 - INFORMATION STORAGE

Halo LSI, Inc.

Organization

Business Address

State Location

State of Incorporation

Patents Grantslast 30 patents

High density vertical structure nitride flash memory

Complementary reference method for high reliability trap-type non-v...

High density vertical structure nitride flash memory

Twin MONOS array for high speed application

Complementary reference method for high reliability trap-type non-v...

High speed operation method for twin MONOS metal bit array

Trap-charge non-volatile switch connector for programmable logic

Trap-charge non-volatile switch connector for programmable logic

Trap-charge non-volatile switch connector for programmable logic

Trap-charge non-volatile switch connector for programmable logic

High speed operation method for twin MONOS metal bit array

Referencing scheme for trap memory

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin MONOS array for high speed application

Non-volatile memory dynamic operations

Nonvolatile memory array organization and usage

Twin insulator charge storage device operation and its fabrication...

Stitch and select implementation in twin MONOS array

Twin insulator charge storage device operation and its fabrication...

Fast program to program verify method

Non-volatile semiconductor memory and driving method

Array architecture and operation methods for a nonvolatile memory

Method of sense and program verify without a reference cell for non...

Twin NAND device structure, array operations and fabrication method

High efficiency triple well charge pump circuit

Patents Applicationslast 30 patents

High Density Vertical Structure Nitride Flash Memory

Twin MONOS Array for High Speed Application

Twin MONOS Array for High Speed Application

Complementary Reference Method for High Reliability Trap-Type Non-V...

Complementary Reference Method for High Reliability Trap-Type Non-V...

High speed operation method for Twin MONOS metal bit array

Complementary Reference method for high reliability trap-type non-v...

Trench monos memory cell and array

Twin MONOS array for high speed application

Continuous pressed laminates

High speed operation method for twin MONOS metal bit array

Twin MONOS array for high speed application

Referencing scheme for trap memory

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Twin insulator charge storage device operation and its fabrication...

Simplified twin monos fabrication method with three extra masks to...

Stitch and select implementation in twin MONOS array

Twin NAND device structure, array operations and fabrication method

Twin NAND device structure, array operations and fabrication method

Fast program to program verify method

Twin MONOS cell fabrication method and array organization

Fast program to program verify method

Fast program to program verify method

Fast program to program verify method

Fast program to program verify method

Fast program to program verify method