Interconnect Portfolio LLC

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Connector constructions for electronic applications
- Patent number 8,333,617
- Issue date Dec 18, 2012
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Connector having a housing with a conductor with a ramp section and...
- Patent number 8,313,333
- Issue date Nov 20, 2012
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Connector constructions for electronic applications
- Patent number 8,246,387
- Issue date Aug 21, 2012
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Electrical connector with conductors with a ramp to induce torsion
- Patent number 8,079,848
- Issue date Dec 20, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Torsionally-induced contact-force conductors for electrical connect...
- Patent number 7,909,615
- Issue date Mar 22, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Torsionally-induced contact-force conductors for electrical connect...
- Patent number 7,845,986
- Issue date Dec 7, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
IC package structures having separate circuit interconnection struc...
- Patent number 7,750,446
- Issue date Jul 6, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-surface IC packaging structures and methods for their manufac...
- Patent number 7,737,545
- Issue date Jun 15, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-surface contact IC packaging structures and assemblies
- Patent number 7,732,904
- Issue date Jun 8, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low profile discrete electronic components and applications of same
- Patent number 7,701,323
- Issue date Apr 20, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Interconnect system without through-holes
- Patent number 7,652,381
- Issue date Jan 26, 2010
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Electrical interconnection devices incorporating redundant contact...
- Patent number 7,651,382
- Issue date Jan 26, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High speed, direct path, stair-step, electronic connectors with imp...
- Patent number 7,651,336
- Issue date Jan 26, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Signal-segregating connector system
- Patent number 7,613,011
- Issue date Nov 3, 2009
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Memory packages having stair step interconnection layers
- Patent number 7,466,021
- Issue date Dec 16, 2008
- Interconnect Portfolio, LLP
- Joseph Charles Fjelstad
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrical interconnection devices incorporating redundant contact...
- Patent number 7,404,746
- Issue date Jul 29, 2008
- Interconnect Portfolio, LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Tapered dielectric and conductor structures and applications thereof
- Patent number 7,388,279
- Issue date Jun 17, 2008
- Interconnect Portfolio, LLC
- Joseph C. Fjelstad
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
CONNECTOR CONSTRUCTIONS FOR ELECTRONIC APPLICATIONS
- Publication number 20130090017
- Publication date Apr 11, 2013
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TORSIONALLY-INDUCED CONTACT-FORCE CONDUCTORS FOR ELECTRICAL CONNECT...
- Publication number 20130078826
- Publication date Mar 28, 2013
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20120149250
- Publication date Jun 14, 2012
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20110171857
- Publication date Jul 14, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Connection for Off-Chip Electrostatic Discharge Protection
- Publication number 20110079912
- Publication date Apr 7, 2011
- Interconnect Portfolio LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Torsionally-Induced Contact-Force Conductors for Electrical Connect...
- Publication number 20110065332
- Publication date Mar 17, 2011
- Interconnect Portfolio LLC
- Gary Yasumura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Vertical Stacking of Integrated Circuit Chips
- Publication number 20100289130
- Publication date Nov 18, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
ESD Protection Utilizing Radiated Thermal Relief
- Publication number 20100284115
- Publication date Nov 11, 2010
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnection of IC Chips by Flex Circuit Superstructure
- Publication number 20100258952
- Publication date Oct 14, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Multi-Surface IC Packaging Structures and Methods for their Manufac...
- Publication number 20100221871
- Publication date Sep 2, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low Profile Discrete Electronic Components and Applications of Same
- Publication number 20100165525
- Publication date Jul 1, 2010
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...
- Publication number 20100151704
- Publication date Jun 17, 2010
- Interconnect Portfolio LLC
- Gary Yasumura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Interconnect System without Through-Holes
- Publication number 20100127402
- Publication date May 27, 2010
- Interconnect Portfolio LLC
- Kevin P. Grundy
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Electrical Interconnection Devices Incorporating Redundant Contact...
- Publication number 20100112829
- Publication date May 6, 2010
- Interconnect Portfolio LLC
- Gary Yasamura
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Controlled Impedance Structures for High Density Interconnections
- Publication number 20090167334
- Publication date Jul 2, 2009
- Interconnect Portfolio LLC
- Joseph C. Fjelstad
- G01 - MEASURING TESTING

Interconnect Portfolio LLC

Organization

Patents Grantslast 30 patents

Connector constructions for electronic applications

Connector having a housing with a conductor with a ramp section and...

Connector constructions for electronic applications

Electrical connector with conductors with a ramp to induce torsion

Torsionally-induced contact-force conductors for electrical connect...

Torsionally-induced contact-force conductors for electrical connect...

IC package structures having separate circuit interconnection struc...

Multi-surface IC packaging structures and methods for their manufac...

Multi-surface contact IC packaging structures and assemblies

Low profile discrete electronic components and applications of same

Interconnect system without through-holes

Electrical interconnection devices incorporating redundant contact...

High speed, direct path, stair-step, electronic connectors with imp...

Signal-segregating connector system

Memory packages having stair step interconnection layers

Electrical interconnection devices incorporating redundant contact...

Tapered dielectric and conductor structures and applications thereof

Patents Applicationslast 30 patents

CONNECTOR CONSTRUCTIONS FOR ELECTRONIC APPLICATIONS

TORSIONALLY-INDUCED CONTACT-FORCE CONDUCTORS FOR ELECTRICAL CONNECT...

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

Connection for Off-Chip Electrostatic Discharge Protection

Torsionally-Induced Contact-Force Conductors for Electrical Connect...

Method and Apparatus for Vertical Stacking of Integrated Circuit Chips

ESD Protection Utilizing Radiated Thermal Relief

Interconnection of IC Chips by Flex Circuit Superstructure

Multi-Surface IC Packaging Structures and Methods for their Manufac...

Low Profile Discrete Electronic Components and Applications of Same

High Speed, Direct Path, Stair-Step, Electronic Connectors with Imp...

Interconnect System without Through-Holes

Electrical Interconnection Devices Incorporating Redundant Contact...

Controlled Impedance Structures for High Density Interconnections

Trademarklast 30 trademarks