MOSAID TECHNOLOGIES CORPORATION

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Phase-locked loop filter capacitance with a drag current
- Patent number 7,567,133
- Issue date Jul 28, 2009
- MOSAID Technologies Corporation
- Randy Caplan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for glitch correction
- Patent number 7,541,880
- Issue date Jun 2, 2009
- MOSAID Technologies Corporation
- Brian Jeffrey Galloway
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with signal bus formed by cell abutment of logic...
- Patent number 7,508,256
- Issue date Mar 24, 2009
- MOSAID Technologies Corporation
- Daniel L. Hillman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power managers for an integrated circuit
- Patent number 7,415,680
- Issue date Aug 19, 2008
- MOSAID Technologies Corporation
- Barry Alan Hoberman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for minimizing static leakage of an integrated...
- Patent number 7,382,178
- Issue date Jun 3, 2008
- MOSAID Technologies Corporation
- Randy J. Caplan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Managing power on integrated circuits using power islands
- Patent number 7,051,306
- Issue date May 23, 2006
- MOSAID Technologies Corporation
- Barry Alan Hoberman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
POWER MANAGERS FOR AN INTEGRATED CIRCUIT
- Publication number 20090152948
- Publication date Jun 18, 2009
- MOSAID TECHNOLOGIES CORPORATION
- Barry Alan HOBERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH SIGNAL BUS FORMED BY CELL ABUTMENT OF LOGIC...
- Publication number 20090140800
- Publication date Jun 4, 2009
- MOSAID TECHNOLOGIES CORPORATION
- Daniel L. HILLMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGERS FOR AN INTEGRATED CIRCUIT
- Publication number 20080276105
- Publication date Nov 6, 2008
- MOSAID TECHNOLOGIES CORPORATION
- Barry Alan HOBERMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BALANCED PSEUDO-RANDOM BINARY SEQUENCE GENERATOR
- Publication number 20080263116
- Publication date Oct 23, 2008
- MOSAID TECHNOLOGIES CORPORATION
- Brian Jeffrey Galloway
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT AND METHOD FOR GLITCH CORRECTION
- Publication number 20080258835
- Publication date Oct 23, 2008
- MOSAID TECHNOLOGIES CORPORATION
- Brian Jeffrey GALLOWAY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SRAM LEAKAGE REDUCTION CIRCUIT
- Publication number 20070252623
- Publication date Nov 1, 2007
- MOSAID TECHNOLOGIES CORPORATION
- Michael Anthony Zampaglione
- H03 - BASIC ELECTRONIC CIRCUITRY

Trademarklast 30 trademarks