PROMOS TECHNOLOGIES PTE.LTD.

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Singapore, SG

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
Shielding of datalines with physical placement based on time stagge...
- Patent number 8,594,114
- Issue date Nov 26, 2013
- ProMOS Technologies Pte. Ltd.
- Jon Faue
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual bit line precharge architecture and method for low power dynam...
- Patent number 8,339,882
- Issue date Dec 25, 2012
- ProMOS Technologies Pte. Ltd.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor devices with gate electrodes and with monocrystalline...
- Patent number 8,283,733
- Issue date Oct 9, 2012
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory devices with charge storage regions
- Patent number 8,125,020
- Issue date Feb 28, 2012
- Promos Technologies Pte. Ltd.
- Yue-Song He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Twin cell architecture for integrated circuit dynamic random access...
- Patent number 7,916,567
- Issue date Mar 29, 2011
- ProMOS Technologies Pte. Ltd.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Grant
Using differential data strobes in non-differential mode to enhance...
- Patent number 7,889,579
- Issue date Feb 15, 2011
- ProMOS Technologies Pte. Ltd.
- Jon Allan Faue
- G11 - INFORMATION STORAGE
Information Patent Grant
N-bit shift register controller
- Patent number 7,889,831
- Issue date Feb 15, 2011
- ProMOS Technologies Pte. Ltd.
- Christopher M. Mnich
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable architecture hybrid analog/digital delay locked loop (...
- Patent number 7,876,137
- Issue date Jan 25, 2011
- ProMOS Technologies Pte. Ltd.
- John D. Heightley
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of repairing deep subsurface defects in a silicon substrate...
- Patent number 7,851,339
- Issue date Dec 14, 2010
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymetric data path position and delays technique enabling high spe...
- Patent number 7,830,734
- Issue date Nov 9, 2010
- ProMOS Technologies Pte. Ltd.
- Jon Allan Faue
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for inspecting and optionally reworking summed photolithogr...
- Patent number 7,829,168
- Issue date Nov 9, 2010
- ProMOS Technologies Pte. Ltd.
- Xinyu Zhang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Nonvolatile memories with laterally recessed charge-trapping dielec...
- Patent number 7,816,726
- Issue date Oct 19, 2010
- ProMOS Technologies Pte. Ltd.
- Yue-Song He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of integrated circuits with isolation trenches
- Patent number 7,807,577
- Issue date Oct 5, 2010
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with substrate protrusions, including (but not...
- Patent number 7,808,032
- Issue date Oct 5, 2010
- ProMOS Technologies Pte. Ltd.
- Yue-Song He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High capacitive load and noise tolerant system and method for contr...
- Patent number 7,782,080
- Issue date Aug 24, 2010
- ProMOS Technologies Pte. Ltd.
- Steve Eaton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Photolithography with optical masks having more transparent feature...
- Patent number 7,771,903
- Issue date Aug 10, 2010
- ProMOS Technologies Pte. Ltd.
- Fenghong Zhang
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Multi-bank block architecture for integrated circuit memory devices...
- Patent number 7,764,565
- Issue date Jul 27, 2010
- ProMOS Technologies Pte. Ltd.
- Jon Allan Faue
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memories with tunnel dielectric with chlorine
- Patent number 7,737,487
- Issue date Jun 15, 2010
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed, low-power input buffer for integrated circuit devices
- Patent number 7,583,110
- Issue date Sep 1, 2009
- ProMOS Technologies Pte. Ltd.
- Douglas Blaine Butler
- G11 - INFORMATION STORAGE
Information Patent Grant
Low skew differential amplifier using tail voltage reference and ta...
- Patent number 7,583,142
- Issue date Sep 1, 2009
- ProMOS Technologies Pte. Ltd.
- Oscar Frederick Jones, Jr.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Automatic duty cycle correction circuit with programmable duty cycl...
- Patent number 7,570,094
- Issue date Aug 4, 2009
- ProMOS Technologies Pte. Ltd.
- Christopher M. Mnich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and technique for adjusting and accurately controlling cloc...
- Patent number 7,518,425
- Issue date Apr 14, 2009
- ProMOS Technologies Pte. Ltd.
- John D. Heightley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Refresh period adjustment technique for dynamic random access memor...
- Patent number 7,515,494
- Issue date Apr 7, 2009
- ProMOS Technologies Pte. Ltd.
- Douglas B. Butler
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of multiple voltage controlled delay lines for precise alignmen...
- Patent number 7,474,136
- Issue date Jan 6, 2009
- ProMOS Technologies Pte. Ltd.
- John D. Heightley
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide window clock scheme for loading output FIFO registers
- Patent number 7,440,351
- Issue date Oct 21, 2008
- ProMOS Technologies Pte. Ltd.
- Jon Allan Faue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing nitrogen concentration with in-situ steam generation
- Patent number 7,387,972
- Issue date Jun 17, 2008
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of TEOS oxides in integrated circuit fabrication processes
- Patent number 7,371,695
- Issue date May 13, 2008
- ProMOS Technologies Pte. Ltd.
- Tai-Peng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of semiconductor device exhibiting reduced dielectric l...
- Patent number 7,355,239
- Issue date Apr 8, 2008
- ProMOS Technologies Pte. Ltd.
- Barbara Haselden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-speed, low-power input buffer for integrated circuit devices
- Patent number 7,250,795
- Issue date Jul 31, 2007
- ProMOS Technologies Pte. Ltd.
- Douglas Blaine Butler
- G11 - INFORMATION STORAGE
Information Patent Grant
Corner protection to reduce wrap around
- Patent number 7,196,381
- Issue date Mar 27, 2007
- Promos Technologies Pte. Ltd.
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS

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Patents Applicationslast 30 patents

Information Patent Application
DUAL BIT LINE PRECHARGE ARCHITECTURE AND METHOD FOR LOW POWER DYNAM...
- Publication number 20120008445
- Publication date Jan 12, 2012
- ProMOS Technologies PTE.LTD.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL BIT LINE PRECHARGE ARCHITECTURE AND METHOD FOR LOW POWER DYNAM...
- Publication number 20120008444
- Publication date Jan 12, 2012
- ProMOS Technologies PTE.LTD.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE ARCHITECTURE HYBRID ANALOG/DIGITAL DELAY LOCKED LOOP (...
- Publication number 20100123494
- Publication date May 20, 2010
- PROMOS TECHNOLOGIES PTE.LTD.
- John D. Heightley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGH CAPACITIVE LOAD AND NOISE TOLERANT SYSTEM AND METHOD FOR CONTR...
- Publication number 20100060315
- Publication date Mar 11, 2010
- PROMOS TECHNOLOGIES PTE.LTD.
- Steve Eaton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SHIELDING OF DATALINES WITH PHYSICAL PLACEMENT BASED ON TIME STAGGE...
- Publication number 20090300255
- Publication date Dec 3, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Faue
- G11 - INFORMATION STORAGE
Information Patent Application
LOW SKEW DIFFERENTIAL AMPLIFIER USING TAIL VOLTAGE REFERENCE AND TA...
- Publication number 20090237162
- Publication date Sep 24, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Oscar Frederick Jones, JR.
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ASSYMETRIC DATA PATH POSITION AND DELAYS TECHNIQUE ENABLING HIGH SP...
- Publication number 20090231945
- Publication date Sep 17, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Allan Faue
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-BANK BLOCK ARCHITECTURE FOR INTEGRATED CIRCUIT MEMORY DEVICES...
- Publication number 20090231944
- Publication date Sep 17, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Allan Faue
- G11 - INFORMATION STORAGE
Information Patent Application
TWIN CELL ARCHITECTURE FOR INTEGRATED CIRCUIT DYNAMIC RANDOM ACCESS...
- Publication number 20090225613
- Publication date Sep 10, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Michael C. Parris
- G11 - INFORMATION STORAGE
Information Patent Application
USING DIFFERENTIAL DATA STROBES IN NON-DIFFERENTIAL MODE TO ENHANCE...
- Publication number 20090190410
- Publication date Jul 30, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Faue
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
N-BIT SHIFT REGISTER CONTROLLER
- Publication number 20090154286
- Publication date Jun 18, 2009
- PROMOS TECHNOLOGIES PTE.LTD.
- Christopher M. Mnich
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORIES WHICH COMBINE A DIELECTRIC, CHARGE-TRAPPING LA...
- Publication number 20090096009
- Publication date Apr 16, 2009
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Achieving Uniform Chemical Mechanical Polishing In Integ...
- Publication number 20080318428
- Publication date Dec 25, 2008
- ProMOS Technologies Pte. Ltd.
- Yi Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AUTOMATIC DUTY CYCLE CORRECTION CIRCUIT WITH PROGRAMMABLE DUTY CYCL...
- Publication number 20080315929
- Publication date Dec 25, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- Christopher M. Mnich
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WIDE WINDOW CLOCK SCHEME FOR LOADING OUTPUT FIFO REGISTERS
- Publication number 20080291748
- Publication date Nov 27, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Allan Faue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIDE WINDOW CLOCK SCHEME FOR LOADING OUTPUT FIFO REGISTERS
- Publication number 20080285371
- Publication date Nov 20, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- Jon Allan Faue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USE OF MULTIPLE VOLTAGE CONTROLLED DELAY LINES FOR PRECISE ALIGNMEN...
- Publication number 20080278211
- Publication date Nov 13, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- John D. Heightley
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS WITH SUBSTRATE PROTRUSIONS, INCLUDING (BUT NOT...
- Publication number 20080266949
- Publication date Oct 30, 2008
- ProMOS Technologies Pte. Ltd.
- Yue-Song He
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO REGULATE PROPAGATION DELAY OF CAPACITIVELY COUPLED PARALL...
- Publication number 20080204102
- Publication date Aug 28, 2008
- ProMOS Technologies Pte. Ltd.
- Harold Brett Meadows
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CIRCUIT AND TECHNIQUE FOR ADJUSTING AND ACCURATELY CONTROLLING CLOC...
- Publication number 20080186068
- Publication date Aug 7, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- John D. Heightley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REFRESH PERIOD ADJUSTMENT TECHNIQUE FOR DYNAMIC RANDOM ACCESS MEMOR...
- Publication number 20080112248
- Publication date May 15, 2008
- PROMOS TECHNOLOGIES PTE.LTD.
- Douglas B. Butler
- G11 - INFORMATION STORAGE
Information Patent Application
Self-aligned contacts to source/drain regions
- Publication number 20080023748
- Publication date Jan 31, 2008
- ProMOS Technologies Pte. Ltd.
- Yi Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USE OF TEOS OXIDES IN INTEGRATED CIRCUIT FABRICATION PROCESSES
- Publication number 20070290292
- Publication date Dec 20, 2007
- ProMOS Technologies Pte. Ltd.
- Tai-Peng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for providing STI structures with high coupling ratio in int...
- Publication number 20070262476
- Publication date Nov 15, 2007
- ProMOS Technologies Pte. Ltd.
- Yi Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for achieving uniform chemical mechanical polishing in integ...
- Publication number 20070264827
- Publication date Nov 15, 2007
- ProMOS Technologies Pte. Ltd.
- Yi Ding
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing nitrogen concentration with in-situ steam generation
- Publication number 20070207627
- Publication date Sep 6, 2007
- ProMOS Technologies Pte. Ltd.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-SPEED, LOW-POWER INPUT BUFFER FOR INTEGRATED CIRCUIT DEVICES
- Publication number 20070176650
- Publication date Aug 2, 2007
- PROMOS TECHNOLOGIES PTE.LTD.
- Douglas Blaine Butler
- G11 - INFORMATION STORAGE
Information Patent Application
Use of TEOS oxides in integrated circuit fabrication processes
- Publication number 20070155189
- Publication date Jul 5, 2007
- ProMOS Technologies Pte. Ltd.
- Tai-Peng Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SHIELDED BITLINE ARCHITECTURE FOR DYNAMIC RANDOM ACCESS MEMORY (DRA...
- Publication number 20070121414
- Publication date May 31, 2007
- PROMOS TECHNOLOGIES PTE.LTD.
- Douglas Blaine Butler
- G11 - INFORMATION STORAGE

PROMOS TECHNOLOGIES PTE.LTD.

Organization

Patents Grantslast 30 patents

Shielding of datalines with physical placement based on time stagge...

Dual bit line precharge architecture and method for low power dynam...

Semiconductor devices with gate electrodes and with monocrystalline...

Non-volatile memory devices with charge storage regions

Twin cell architecture for integrated circuit dynamic random access...

Using differential data strobes in non-differential mode to enhance...

N-bit shift register controller

Configurable architecture hybrid analog/digital delay locked loop (...

Method of repairing deep subsurface defects in a silicon substrate...

Asymetric data path position and delays technique enabling high spe...

Methods for inspecting and optionally reworking summed photolithogr...

Nonvolatile memories with laterally recessed charge-trapping dielec...

Fabrication of integrated circuits with isolation trenches

Integrated circuits with substrate protrusions, including (but not...

High capacitive load and noise tolerant system and method for contr...

Photolithography with optical masks having more transparent feature...

Multi-bank block architecture for integrated circuit memory devices...

Nonvolatile memories with tunnel dielectric with chlorine

High-speed, low-power input buffer for integrated circuit devices

Low skew differential amplifier using tail voltage reference and ta...

Automatic duty cycle correction circuit with programmable duty cycl...

Circuit and technique for adjusting and accurately controlling cloc...

Refresh period adjustment technique for dynamic random access memor...

Use of multiple voltage controlled delay lines for precise alignmen...

Wide window clock scheme for loading output FIFO registers

Reducing nitrogen concentration with in-situ steam generation

Use of TEOS oxides in integrated circuit fabrication processes

Fabrication of semiconductor device exhibiting reduced dielectric l...

High-speed, low-power input buffer for integrated circuit devices

Corner protection to reduce wrap around

Patents Applicationslast 30 patents

DUAL BIT LINE PRECHARGE ARCHITECTURE AND METHOD FOR LOW POWER DYNAM...

DUAL BIT LINE PRECHARGE ARCHITECTURE AND METHOD FOR LOW POWER DYNAM...

CONFIGURABLE ARCHITECTURE HYBRID ANALOG/DIGITAL DELAY LOCKED LOOP (...

HIGH CAPACITIVE LOAD AND NOISE TOLERANT SYSTEM AND METHOD FOR CONTR...

SHIELDING OF DATALINES WITH PHYSICAL PLACEMENT BASED ON TIME STAGGE...

LOW SKEW DIFFERENTIAL AMPLIFIER USING TAIL VOLTAGE REFERENCE AND TA...

ASSYMETRIC DATA PATH POSITION AND DELAYS TECHNIQUE ENABLING HIGH SP...

MULTI-BANK BLOCK ARCHITECTURE FOR INTEGRATED CIRCUIT MEMORY DEVICES...

TWIN CELL ARCHITECTURE FOR INTEGRATED CIRCUIT DYNAMIC RANDOM ACCESS...

USING DIFFERENTIAL DATA STROBES IN NON-DIFFERENTIAL MODE TO ENHANCE...

N-BIT SHIFT REGISTER CONTROLLER

NONVOLATILE MEMORIES WHICH COMBINE A DIELECTRIC, CHARGE-TRAPPING LA...

Method for Achieving Uniform Chemical Mechanical Polishing In Integ...

AUTOMATIC DUTY CYCLE CORRECTION CIRCUIT WITH PROGRAMMABLE DUTY CYCL...

WIDE WINDOW CLOCK SCHEME FOR LOADING OUTPUT FIFO REGISTERS

WIDE WINDOW CLOCK SCHEME FOR LOADING OUTPUT FIFO REGISTERS

USE OF MULTIPLE VOLTAGE CONTROLLED DELAY LINES FOR PRECISE ALIGNMEN...

INTEGRATED CIRCUITS WITH SUBSTRATE PROTRUSIONS, INCLUDING (BUT NOT...

METHOD TO REGULATE PROPAGATION DELAY OF CAPACITIVELY COUPLED PARALL...

CIRCUIT AND TECHNIQUE FOR ADJUSTING AND ACCURATELY CONTROLLING CLOC...

REFRESH PERIOD ADJUSTMENT TECHNIQUE FOR DYNAMIC RANDOM ACCESS MEMOR...

Self-aligned contacts to source/drain regions

USE OF TEOS OXIDES IN INTEGRATED CIRCUIT FABRICATION PROCESSES

Method for providing STI structures with high coupling ratio in int...

Method for achieving uniform chemical mechanical polishing in integ...

Reducing nitrogen concentration with in-situ steam generation

HIGH-SPEED, LOW-POWER INPUT BUFFER FOR INTEGRATED CIRCUIT DEVICES

Use of TEOS oxides in integrated circuit fabrication processes

SHIELDED BITLINE ARCHITECTURE FOR DYNAMIC RANDOM ACCESS MEMORY (DRA...