SilTerra Malaysia Sdn. Bhd.

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Kedah, MY

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Patents Grantslast 30 patents

Information Patent Grant
Device for determining information of a substance in a matter
- Patent number 11,719,669
- Issue date Aug 8, 2023
- Silterra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Monolithic integration of PMUT on CMOS
- Patent number 10,322,929
- Issue date Jun 18, 2019
- Silterra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Monolithic integrated device
- Patent number 10,199,430
- Issue date Feb 5, 2019
- Silterra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Parallel stacked symmetrical and differential inductor
- Patent number 9,111,676
- Issue date Aug 18, 2015
- Silterra Malaysia Sdn. Bhd.
- Chun Lee Ler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a planarised reflective layer for micromir...
- Patent number 9,091,928
- Issue date Jul 28, 2015
- Silterra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- G02 - OPTICS
Information Patent Grant
Method for fabricating a bottom oxide layer in a trench
- Patent number 8,633,113
- Issue date Jan 21, 2014
- SilTerra Malaysia Sdn. Bhd.
- Charlie Tay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
On-chip capacitor
- Patent number 7,342,766
- Issue date Mar 11, 2008
- Silterra Malaysia Sdn. Bhd.
- Chin B. Cheah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via etch monitoring
- Patent number 7,262,608
- Issue date Aug 28, 2007
- Silterra Malaysia Sdn. Bhd.
- Chin B. Cheah
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device with dual gate oxides
- Patent number 7,259,071
- Issue date Aug 21, 2007
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation
- Patent number 7,241,665
- Issue date Jul 10, 2007
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation
- Patent number 7,091,104
- Issue date Aug 15, 2006
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming ultra shallow junctions
- Patent number 7,022,577
- Issue date Apr 4, 2006
- SilTerra Malaysia Sdn. Bhd.
- Narayanan Meyyappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having multiple gate oxide layers and method o...
- Patent number 6,890,822
- Issue date May 10, 2005
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual phase grating alignment marks
- Patent number 6,864,956
- Issue date Mar 8, 2005
- SilTerra Malaysia Sdn. Bhd.
- Lim Chin Teong
- G01 - MEASURING TESTING
Information Patent Grant
Static pad conditioner
- Patent number 6,821,190
- Issue date Nov 23, 2004
- SilTerra Malaysia Sdn. Bhd.
- Daniel Lynne Towery
- B24 - GRINDING POLISHING
Information Patent Grant
Semiconductor device with dual gate oxides
- Patent number 6,818,514
- Issue date Nov 16, 2004
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pre-heating dilution gas before mixing with steam in diffusion furnace
- Patent number 6,726,468
- Issue date Apr 27, 2004
- SilTerra Malaysia Sdn. Bhd.
- Kader Ibrahim
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
DEVICE FOR DETERMINING INFORMATION OF A SUBSTANCE IN A MATTER
- Publication number 20210341424
- Publication date Nov 4, 2021
- SilTerra Malaysia Sdn. Bhd.
- MOHANRAJ SOUNDARA PANDIAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR SILICON NANOSENSOR MANUFACTURING AND INTEGRATION WITH CM...
- Publication number 20210257395
- Publication date Aug 19, 2021
- SilTerra Malaysia Sdn. Bhd.
- Saw Li Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH FARADAY SHIELD
- Publication number 20200013880
- Publication date Jan 9, 2020
- SilTerra Malaysia Sdn. Bhd.
- Chiew Nyuk Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MONOLITHIC INTEGRATION OF PMUT ON CMOS
- Publication number 20190100427
- Publication date Apr 4, 2019
- SilTerra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MONOLITHIC INTEGRATED DEVICE
- Publication number 20180151622
- Publication date May 31, 2018
- SilTerra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
PARALLEL STACKED SYMMETRICAL AND DIFFERENTIAL INDUCTOR
- Publication number 20130249660
- Publication date Sep 26, 2013
- SilTerra Malaysia Sdn. Bhd.
- Chun Lee LER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A PLANARISED REFLECTIVE LAYER FOR MICROMIR...
- Publication number 20130171573
- Publication date Jul 4, 2013
- SilTerra Malaysia Sdn. Bhd.
- Mohanraj Soundara Pandian
- G02 - OPTICS
Information Patent Application
Process for making an alignment structure in the fabrication of a s...
- Publication number 20110284990
- Publication date Nov 24, 2011
- SilTerra Malaysia Sdn. Bhd.
- Anbu Selvam Mahalingam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation
- Publication number 20060258116
- Publication date Nov 16, 2006
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device having multiple gate oxide layers and method o...
- Publication number 20050287745
- Publication date Dec 29, 2005
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with dual gate oxides
- Publication number 20050059215
- Publication date Mar 17, 2005
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming ultra shallow junctions
- Publication number 20040224488
- Publication date Nov 11, 2004
- SilTerra Malaysia Sdn. Bhd.
- Narayanan Meyyappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with dual gate oxides
- Publication number 20040166698
- Publication date Aug 26, 2004
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device having multiple gate oxide layers and method o...
- Publication number 20040161897
- Publication date Aug 19, 2004
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation
- Publication number 20040147090
- Publication date Jul 29, 2004
- SilTerra Malaysia Sdn. Bhd.
- Inki Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming ultra shallow junctions
- Publication number 20040097057
- Publication date May 20, 2004
- SilTerra Malaysia Sdn. Bhd.
- Narayanan Meyyappan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Modified deposition ring to eliminate backside and wafer edge coating
- Publication number 20040083976
- Publication date May 6, 2004
- SilTerra Malaysia Sdn. Bhd.
- Narayanan Meyyappan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
PRE-HEATING DILUTION GAS BEFORE MIXING WITH STEAM IN DIFFUSION FURNACE
- Publication number 20040058287
- Publication date Mar 25, 2004
- SilTerra Malaysia Sdn. Bhd.
- Kader Ibrahim
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

SilTerra Malaysia Sdn. Bhd.

Organization

Patents Grantslast 30 patents

Device for determining information of a substance in a matter

Monolithic integration of PMUT on CMOS

Monolithic integrated device

Parallel stacked symmetrical and differential inductor

Method for manufacturing a planarised reflective layer for micromir...

Method for fabricating a bottom oxide layer in a trench

On-chip capacitor

Via etch monitoring

Semiconductor device with dual gate oxides

Shallow trench isolation

Shallow trench isolation

Method of forming ultra shallow junctions

Semiconductor device having multiple gate oxide layers and method o...

Dual phase grating alignment marks

Static pad conditioner

Semiconductor device with dual gate oxides

Pre-heating dilution gas before mixing with steam in diffusion furnace

Patents Applicationslast 30 patents

DEVICE FOR DETERMINING INFORMATION OF A SUBSTANCE IN A MATTER

METHOD FOR SILICON NANOSENSOR MANUFACTURING AND INTEGRATION WITH CM...

INTEGRATED CIRCUIT DEVICE WITH FARADAY SHIELD

MONOLITHIC INTEGRATION OF PMUT ON CMOS

MONOLITHIC INTEGRATED DEVICE

PARALLEL STACKED SYMMETRICAL AND DIFFERENTIAL INDUCTOR

METHOD FOR MANUFACTURING A PLANARISED REFLECTIVE LAYER FOR MICROMIR...

Process for making an alignment structure in the fabrication of a s...

Shallow trench isolation

Semiconductor device having multiple gate oxide layers and method o...

Semiconductor device with dual gate oxides

Method of forming ultra shallow junctions

Semiconductor device with dual gate oxides

Semiconductor device having multiple gate oxide layers and method o...

Shallow trench isolation

Method of forming ultra shallow junctions

Modified deposition ring to eliminate backside and wafer edge coating

PRE-HEATING DILUTION GAS BEFORE MIXING WITH STEAM IN DIFFUSION FURNACE

Trademarklast 30 trademarks