Adil Bhanji

Person

Wappingers Falls, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apportionment aware hierarchical timing optimization
- Patent number 10,970,455
- Issue date Apr 6, 2021
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology lookup table-based default assertion generation and cons...
- Patent number 10,831,954
- Issue date Nov 10, 2020
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock domain-independent abstracts
- Patent number 10,318,683
- Issue date Jun 11, 2019
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Callback based constraint processing for clock domain independence
- Patent number 10,169,503
- Issue date Jan 1, 2019
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Callback based constraint processing for clock domain independence
- Patent number 9,977,850
- Issue date May 22, 2018
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of hierarchical timing closure employing dynamic load-sensit...
- Patent number 9,607,124
- Issue date Mar 28, 2017
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modeling full and half cycle clock variability
- Patent number 8,185,371
- Issue date May 22, 2012
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing a statistical timing abstraction for a hierarchical timi...
- Patent number 8,122,404
- Issue date Feb 21, 2012
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of employing slew dependent pin capacitances to capture inte...
- Patent number 8,103,997
- Issue date Jan 24, 2012
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of modeling and employing the CMOS gate slew and output load...
- Patent number 7,788,617
- Issue date Aug 31, 2010
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED...
- Publication number 20240330551
- Publication date Oct 3, 2024
- International Business Machines Corporation
- HEMLATA GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC UPDATE OF MACRO TIMING MODELS DURING HIGHER-LEVEL TIMING AN...
- Publication number 20190362043
- Publication date Nov 28, 2019
- International Business Machines Corporation
- Hemlata Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COGNITIVE SYSTEM TO ITERATIVELY EXPAND A KNOWLEDGE BASE
- Publication number 20190138916
- Publication date May 9, 2019
- International Business Machines Corporation
- Robert J. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALLBACK BASED CONSTRAINT PROCESSING FOR CLOCK DOMAIN INDEPENDENCE
- Publication number 20180173833
- Publication date Jun 21, 2018
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALLBACK BASED CONSTRAINT PROCESSING FOR CLOCK DOMAIN INDEPENDENCE
- Publication number 20180018421
- Publication date Jan 18, 2018
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK DOMAIN-INDEPENDENT ABSTRACTS
- Publication number 20170337313
- Publication date Nov 23, 2017
- International Business Machines Corporation
- Naiju K. Abdul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Hierarchical Timing Closure Employing Dynamic Load-Sensit...
- Publication number 20160314236
- Publication date Oct 27, 2016
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Employing Slew Dependent Pin Capacitances to Capture Inte...
- Publication number 20100269083
- Publication date Oct 21, 2010
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODELING FULL AND HALF CYCLE CLOCK VARIABILITY
- Publication number 20100268522
- Publication date Oct 21, 2010
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Performing Statistical Timing Abstraction for Hierarchica...
- Publication number 20100211922
- Publication date Aug 19, 2010
- International Business Machines Corporation
- Debjit Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of modeling and employing the CMOS gate slew and output load...
- Publication number 20090228850
- Publication date Sep 10, 2009
- International Business Machines Corporation
- Adil Bhanji
- G06 - COMPUTING CALCULATING COUNTING

Adil Bhanji

Person

Patents Grantslast 30 patents

Apportionment aware hierarchical timing optimization

Technology lookup table-based default assertion generation and cons...

Clock domain-independent abstracts

Callback based constraint processing for clock domain independence

Callback based constraint processing for clock domain independence

Method of hierarchical timing closure employing dynamic load-sensit...

Modeling full and half cycle clock variability

Performing a statistical timing abstraction for a hierarchical timi...

Method of employing slew dependent pin capacitances to capture inte...

Method of modeling and employing the CMOS gate slew and output load...

Patents Applicationslast 30 patents

TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED...

DYNAMIC UPDATE OF MACRO TIMING MODELS DURING HIGHER-LEVEL TIMING AN...

COGNITIVE SYSTEM TO ITERATIVELY EXPAND A KNOWLEDGE BASE

CALLBACK BASED CONSTRAINT PROCESSING FOR CLOCK DOMAIN INDEPENDENCE

CALLBACK BASED CONSTRAINT PROCESSING FOR CLOCK DOMAIN INDEPENDENCE

CLOCK DOMAIN-INDEPENDENT ABSTRACTS

Method of Hierarchical Timing Closure Employing Dynamic Load-Sensit...

Method of Employing Slew Dependent Pin Capacitances to Capture Inte...

MODELING FULL AND HALF CYCLE CLOCK VARIABILITY

Method of Performing Statistical Timing Abstraction for Hierarchica...

Method of modeling and employing the CMOS gate slew and output load...