Aftab Ahmad

Person

Lake Oswego, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Shallow trench isolation using low dielectric constant insulator
- Patent number 7,176,549
- Issue date Feb 13, 2007
- Micron Technology, Inc.
- Klaus F. Schuegraf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of integrated devices using nitrogen implantation
- Patent number 7,071,067
- Issue date Jul 4, 2006
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier in gate stack for improved gate dielectric integrity
- Patent number 6,930,363
- Issue date Aug 16, 2005
- Micron Technology, Inc.
- Nanseng Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,858,507
- Issue date Feb 22, 2005
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation using low dielectric constant insulator
- Patent number 6,831,347
- Issue date Dec 14, 2004
- Micron Technology, Inc.
- Klaus F. Schuegraf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation structure having trench structures formed on both side of...
- Patent number 6,809,395
- Issue date Oct 26, 2004
- Micron Technology, Inc.
- Fernando Gonzales
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier in gate stack for improved gate dielectric integrity
- Patent number 6,770,571
- Issue date Aug 3, 2004
- Micron Technology, Inc.
- Nanseng Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding pad isolation
- Patent number 6,743,979
- Issue date Jun 1, 2004
- LSI Logic Corporation
- Michael J. Berman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,664,600
- Issue date Dec 16, 2003
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuitry, methods of forming elevate...
- Patent number 6,660,600
- Issue date Dec 9, 2003
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor transistor devices and structures with halo regions
- Patent number 6,552,394
- Issue date Apr 22, 2003
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,495,885
- Issue date Dec 17, 2002
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,448,141
- Issue date Sep 10, 2002
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuitry and methods of forming elev...
- Patent number 6,444,529
- Issue date Sep 3, 2002
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier in gate stack for improved gate dielectric integrity
- Patent number 6,373,114
- Issue date Apr 16, 2002
- Micron Technology, Inc.
- Nanseng Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor transistor devices and methods for forming semiconduc...
- Patent number 6,346,439
- Issue date Feb 12, 2002
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor transistor devices and methods for forming semiconduc...
- Patent number 6,333,539
- Issue date Dec 25, 2001
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor processing method of fabricating field effect transis...
- Patent number 6,326,250
- Issue date Dec 4, 2001
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor transistor devices and methods for forming semiconduc...
- Patent number 6,319,779
- Issue date Nov 20, 2001
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a metal-to-metal capacitor utilizing only...
- Patent number 6,281,092
- Issue date Aug 28, 2001
- LSI Logic Corporation
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming integrated circuitry, methods of forming elevate...
- Patent number 6,211,026
- Issue date Apr 3, 2001
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor transistor devices and methods for forming semiconduc...
- Patent number 6,165,827
- Issue date Dec 26, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,159,813
- Issue date Dec 12, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor processing method of fabricating field effect transis...
- Patent number 6,150,204
- Issue date Nov 21, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming CMOS circuitry including patterning conductive ma...
- Patent number 6,136,637
- Issue date Oct 24, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a resistor and integrated circuitry having a resi...
- Patent number 6,130,137
- Issue date Oct 10, 2000
- Micron Technology, Inc.
- Kirk Prall
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a field effect transistor
- Patent number 6,107,145
- Issue date Aug 22, 2000
- Micron Technology, Inc.
- Charles H. Dennison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a LOCOS trench isolation structure
- Patent number 6,090,685
- Issue date Jul 18, 2000
- Micron Technology Inc.
- Fernando Gonzales
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Graded LDD implant process for sub-half-micron MOS devices
- Patent number 6,046,472
- Issue date Apr 4, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication of integrated devices using nitrogen implantation
- Patent number 6,037,639
- Issue date Mar 14, 2000
- Micron Technology, Inc.
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
LOCOS trench isolation structures
- Publication number 20060231902
- Publication date Oct 19, 2006
- Fernando Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow trench isolation using low dielectric constant insulator
- Publication number 20050087833
- Publication date Apr 28, 2005
- Klaus F. Schuegraf
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier in gate stack for improved gate dielectric integrity
- Publication number 20050017312
- Publication date Jan 27, 2005
- Nanseng Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Locos trench isolation structure
- Publication number 20050012158
- Publication date Jan 20, 2005
- Micron Technology, Inc.
- Fernando Gonzalez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier in gate stack for improved gate dielectric integrity
- Publication number 20030139061
- Publication date Jul 24, 2003
- Nanseng Jeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of forming integrated circuitry, methods of forming elevate...
- Publication number 20020197804
- Publication date Dec 26, 2002
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Graded LDD implant process for sub-half-micron MOS devices
- Publication number 20020190315
- Publication date Dec 19, 2002
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Graded LDD implant process for sub-half-micron MOS devices
- Publication number 20020182813
- Publication date Dec 5, 2002
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor transistor devices and methods for forming semiconduc...
- Publication number 20020074597
- Publication date Jun 20, 2002
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of forming integrated circuitry and methods of forming elev...
- Publication number 20010009791
- Publication date Jul 26, 2001
- Aftab Ahmad
- H01 - BASIC ELECTRIC ELEMENTS

Aftab Ahmad

Person

Patents Grantslast 30 patents

Shallow trench isolation using low dielectric constant insulator

Fabrication of integrated devices using nitrogen implantation

Barrier in gate stack for improved gate dielectric integrity

Graded LDD implant process for sub-half-micron MOS devices

Shallow trench isolation using low dielectric constant insulator

Isolation structure having trench structures formed on both side of...

Barrier in gate stack for improved gate dielectric integrity

Bonding pad isolation

Graded LDD implant process for sub-half-micron MOS devices

Methods of forming integrated circuitry, methods of forming elevate...

Semiconductor transistor devices and structures with halo regions

Graded LDD implant process for sub-half-micron MOS devices

Graded LDD implant process for sub-half-micron MOS devices

Methods of forming integrated circuitry and methods of forming elev...

Barrier in gate stack for improved gate dielectric integrity

Semiconductor transistor devices and methods for forming semiconduc...

Semiconductor transistor devices and methods for forming semiconduc...

Semiconductor processing method of fabricating field effect transis...

Semiconductor transistor devices and methods for forming semiconduc...

Method for manufacturing a metal-to-metal capacitor utilizing only...

Methods of forming integrated circuitry, methods of forming elevate...

Semiconductor transistor devices and methods for forming semiconduc...

Graded LDD implant process for sub-half-micron MOS devices

Semiconductor processing method of fabricating field effect transis...

Method of forming CMOS circuitry including patterning conductive ma...

Method of forming a resistor and integrated circuitry having a resi...

Method for forming a field effect transistor

Method of forming a LOCOS trench isolation structure

Graded LDD implant process for sub-half-micron MOS devices

Fabrication of integrated devices using nitrogen implantation

Patents Applicationslast 30 patents

LOCOS trench isolation structures

Shallow trench isolation using low dielectric constant insulator

Barrier in gate stack for improved gate dielectric integrity

Locos trench isolation structure

Barrier in gate stack for improved gate dielectric integrity

Methods of forming integrated circuitry, methods of forming elevate...

Graded LDD implant process for sub-half-micron MOS devices

Graded LDD implant process for sub-half-micron MOS devices

Semiconductor transistor devices and methods for forming semiconduc...

Methods of forming integrated circuitry and methods of forming elev...