Albert Chan

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable logic device with enhanced wide input product term cas...
- Patent number 6,903,573
- Issue date Jun 7, 2005
- Lattice Semiconductor Corporation
- Jason Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for joining large substrates
- Patent number 6,866,741
- Issue date Mar 15, 2005
- Fujitsu Limited
- Albert W. Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Stencil and method for depositing solder
- Patent number 6,592,943
- Issue date Jul 15, 2003
- Fujitsu Limited
- Albert W. Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Conductive composition
- Patent number 6,579,474
- Issue date Jun 17, 2003
- Fujitsu Limited
- Mark Thomas McCormack
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Interconnect assembly and Z-connection method for fine pitch substr...
- Patent number 6,518,096
- Issue date Feb 11, 2003
- Fujitsu Limited
- Albert W. Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Programmable logic device
- Patent number 6,462,576
- Issue date Oct 8, 2002
- Lattice Semiconductor Corporation
- Albert Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Simultaneous wired and wireless remote in-system programming of mul...
- Patent number 6,389,321
- Issue date May 14, 2002
- Lattice Semiconductor Corporation
- Howard S. Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and structure dynamic in-system programming
- Patent number 6,356,107
- Issue date Mar 12, 2002
- Lattice Semiconductor Corporation
- Howard Y. M. Tang
- G01 - MEASURING TESTING
Information Patent Grant
Method and structure for dynamic in-system programming
- Patent number 6,304,099
- Issue date Oct 16, 2001
- Lattice Semiconductor Corporation
- Howard Y. M. Tang
- G01 - MEASURING TESTING
Information Patent Grant
Programmable logic device
- Patent number 6,294,925
- Issue date Sep 25, 2001
- Lattice Semiconductor Corporation
- Albert Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods for making circuit substrates and electrical assemblies
- Patent number 6,281,040
- Issue date Aug 28, 2001
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for minimizing instantaneous currents when driving bus signals
- Patent number 6,278,311
- Issue date Aug 21, 2001
- Lattice Semiconductor Corporation
- Albert Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device
- Patent number 6,255,847
- Issue date Jul 3, 2001
- Lattice Semiconductor Corporation
- Albert Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable integrated circuit device with slew control and skew c...
- Patent number 6,229,336
- Issue date May 8, 2001
- Lattice Semiconductor Corporation
- Bradley Felton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combination of global clock and localized clocks
- Patent number 6,191,609
- Issue date Feb 20, 2001
- Lattice Semiconductor Corporation
- Albert Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combination of global clock and localized clocks
- Patent number 6,133,750
- Issue date Oct 17, 2000
- Lattice Semiconductor Corp.
- Albert Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device
- Patent number 6,104,207
- Issue date Aug 15, 2000
- Lattice Semiconductor Corporation
- Albert Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable output voltage levels
- Patent number 6,066,977
- Issue date May 23, 2000
- Lattice Semiconductor Corporation
- Bradley Felton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-layer circuit substrates and electrical assemblies having con...
- Patent number 6,054,761
- Issue date Apr 25, 2000
- Fujitsu Limited
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of paste printing using stencil and masking layer
- Patent number 6,047,637
- Issue date Apr 11, 2000
- Fujitsu Limited
- Albert W. Chan
- B41 - PRINTING LINING MACHINES TYPEWRITERS STAMPS
Information Patent Grant
Sequential and simultaneous manufacturing programming of multiple i...
- Patent number 6,023,570
- Issue date Feb 8, 2000
- Lattice Semiconductor Corp.
- Howard Y. M. Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application specific modules in a programmable logic device
- Patent number 5,835,405
- Issue date Nov 10, 1998
- Lattice Semiconductor Corporation
- Cyrus Y. Tsui
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output enable structure and method for a programmable logic device
- Patent number 5,506,517
- Issue date Apr 9, 1996
- Lattice Semiconductor Corporation
- Cyrus Y. Tsui
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiplexed control pins for in-system programming and boundary sca...
- Patent number 5,412,260
- Issue date May 2, 1995
- Lattice Semiconductor Corporation
- Cyrus Y. Tsui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output logic macrocell with enhanced functional capabilities
- Patent number 5,191,243
- Issue date Mar 2, 1993
- Lattice Semiconductor Corporation
- Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier with depletion transistor feedback
- Patent number 5,162,679
- Issue date Nov 10, 1992
- Lattice Semiconductor Corporation
- Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated programmable logic device with control circuit to power...
- Patent number 5,138,198
- Issue date Aug 11, 1992
- Lattice Semiconductor Corporation
- Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device providing product term sharing and steeri...
- Patent number 5,130,574
- Issue date Jul 14, 1992
- Lattice Semiconductor Corporation
- Ju Shen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic array with added array of gates and added output...
- Patent number 4,758,746
- Issue date Jul 19, 1988
- Monolithic Memories, Inc.
- John Birkner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short detector for PROMS
- Patent number 4,701,695
- Issue date Oct 20, 1987
- Monolithic Memories, Inc.
- Albert Chan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Thermal interface adhesive
- Publication number 20050056365
- Publication date Mar 17, 2005
- Albert Chan
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Device and method with generic logic blocks
- Publication number 20040000928
- Publication date Jan 1, 2004
- Lattice Semiconductor Corporation
- Jason Cheng
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Structure and method for forming z-laminated multilayered packaging...
- Publication number 20020119396
- Publication date Aug 29, 2002
- Hunt Hang Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for joining large substrates
- Publication number 20020088540
- Publication date Jul 11, 2002
- Albert W. Chan
- B32 - LAYERED PRODUCTS
Information Patent Application
Interconnect assembly and z-connection method for fine pitch substr...
- Publication number 20020090754
- Publication date Jul 11, 2002
- Albert W. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stencil and method for depositing solder
- Publication number 20010046586
- Publication date Nov 29, 2001
- Albert W. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIMULTANEOUS WIRED AND WIRELESS REMOTE IN-SYSTEM PROGRAMMING OF MUL...
- Publication number 20010041943
- Publication date Nov 15, 2001
- HOWARD Y. TANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Conductive composition
- Publication number 20010030062
- Publication date Oct 18, 2001
- Mark Thomas McCormack
- H01 - BASIC ELECTRIC ELEMENTS

Albert Chan

Person

Patents Grantslast 30 patents

Programmable logic device with enhanced wide input product term cas...

Method for joining large substrates

Stencil and method for depositing solder

Conductive composition

Interconnect assembly and Z-connection method for fine pitch substr...

Programmable logic device

Simultaneous wired and wireless remote in-system programming of mul...

Method and structure dynamic in-system programming

Method and structure for dynamic in-system programming

Programmable logic device

Methods for making circuit substrates and electrical assemblies

Method for minimizing instantaneous currents when driving bus signals

Programmable logic device

Programmable integrated circuit device with slew control and skew c...

Combination of global clock and localized clocks

Combination of global clock and localized clocks

Programmable logic device

Programmable output voltage levels

Multi-layer circuit substrates and electrical assemblies having con...

Method of paste printing using stencil and masking layer

Sequential and simultaneous manufacturing programming of multiple i...

Application specific modules in a programmable logic device

Output enable structure and method for a programmable logic device

Multiplexed control pins for in-system programming and boundary sca...

Output logic macrocell with enhanced functional capabilities

Sense amplifier with depletion transistor feedback

Integrated programmable logic device with control circuit to power...

Programmable logic device providing product term sharing and steeri...

Programmable logic array with added array of gates and added output...

Short detector for PROMS

Patents Applicationslast 30 patents

Thermal interface adhesive

Device and method with generic logic blocks

Structure and method for forming z-laminated multilayered packaging...

Method for joining large substrates

Interconnect assembly and z-connection method for fine pitch substr...

Stencil and method for depositing solder

SIMULTANEOUS WIRED AND WIRELESS REMOTE IN-SYSTEM PROGRAMMING OF MUL...

Conductive composition