Albert Ratnakumar

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and associated methods for capacitors with improved densi...
- Patent number 9,627,138
- Issue date Apr 18, 2017
- Altera Corporation
- Shuxian Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 9,496,268
- Issue date Nov 15, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for fabricating PNP bipolar junction transistors
- Patent number 9,455,338
- Issue date Sep 27, 2016
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable device with a metal oxide semiconductor field effect t...
- Patent number 9,196,749
- Issue date Nov 24, 2015
- Altera Corporation
- Charu Sardana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating integrated circuit transistors with multipart...
- Patent number 9,190,332
- Issue date Nov 17, 2015
- Altera Corporation
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of using a PMOS pass gate
- Patent number 9,165,640
- Issue date Oct 20, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
High resolution capacitor
- Patent number 8,933,751
- Issue date Jan 13, 2015
- Altera Corporation
- Wilson Wong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuits with asymmetric pass transistors
- Patent number 8,921,170
- Issue date Dec 30, 2014
- Altera Corporation
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit resistors with reduced parasitic capacitance
- Patent number 8,878,334
- Issue date Nov 4, 2014
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS pass gate
- Patent number 8,804,407
- Issue date Aug 12, 2014
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 8,750,026
- Issue date Jun 10, 2014
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit transistors with multipart gate conductors
- Patent number 8,735,983
- Issue date May 27, 2014
- Altera Corporation
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory element transistors with reversed-workfunction gate conductors
- Patent number 8,530,976
- Issue date Sep 10, 2013
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric and stacked transistors
- Patent number 8,482,963
- Issue date Jul 9, 2013
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with nonvolatile memory elements
- Patent number 8,467,240
- Issue date Jun 18, 2013
- Altera Corporation
- Albert Ratnakumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Very low voltage reference circuit
- Patent number 8,264,214
- Issue date Sep 11, 2012
- Altera Corporation
- Albert Ratnakumar
- G05 - CONTROLLING REGULATING
Information Patent Grant
Mixed-gate metal-oxide-semiconductor varactors
- Patent number 8,242,581
- Issue date Aug 14, 2012
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with asymmetric pass transistors
- Patent number 8,138,797
- Issue date Mar 20, 2012
- Altera Corporation
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stressed transistors with reduced leakage
- Patent number 8,138,791
- Issue date Mar 20, 2012
- Altera Corporation
- Albert Ratnakumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuits with nonvolatile memory elements
- Patent number 8,116,130
- Issue date Feb 14, 2012
- Altera Corporation
- Albert Ratnakumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory elements with body bias control
- Patent number 8,081,502
- Issue date Dec 20, 2011
- Altera Corporation
- Irfan Rahim
- G11 - INFORMATION STORAGE
Information Patent Grant
Process/design methodology to enable high performance logic and ana...
- Patent number 7,952,423
- Issue date May 31, 2011
- Altera Corporation
- Qi Xiang
- G05 - CONTROLLING REGULATING
Information Patent Grant
Integrated circuits with metal-oxide-semiconductor transistors havi...
- Patent number 7,812,408
- Issue date Oct 12, 2010
- Altera Corporation
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20160232952
- Publication date Aug 11, 2016
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuits with Asymmetric and Stacked Transistors
- Publication number 20150318029
- Publication date Nov 5, 2015
- Altera Corporation
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
VERY LOW VOLTAGE REFERENCE CIRCUIT
- Publication number 20120235662
- Publication date Sep 20, 2012
- Albert Ratnakumar
- G05 - CONTROLLING REGULATING
Information Patent Application
ASYMMETRIC METAL-OXIDE-SEMICONDUCTOR TRANSISTORS
- Publication number 20100127331
- Publication date May 27, 2010
- Albert Ratnakumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT TRANSISTORS
- Publication number 20100127332
- Publication date May 27, 2010
- Jun Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL-OXIDE-METAL CAPACITORS WITH BAR VIAS
- Publication number 20100090308
- Publication date Apr 15, 2010
- Charu Sardana
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANA...
- Publication number 20100079200
- Publication date Apr 1, 2010
- Qi Xiang
- G05 - CONTROLLING REGULATING
Information Patent Application
VARACTORS WITH ENHANCED TUNING RANGES
- Publication number 20100019351
- Publication date Jan 28, 2010
- Albert Ratnakumar
- H01 - BASIC ELECTRIC ELEMENTS

Albert Ratnakumar

Person

Patents Grantslast 30 patents

Apparatus and associated methods for capacitors with improved densi...

Integrated circuits with asymmetric and stacked transistors

Methods for fabricating PNP bipolar junction transistors

Programmable device with a metal oxide semiconductor field effect t...

Method of fabricating integrated circuit transistors with multipart...

Method of using a PMOS pass gate

High resolution capacitor

Integrated circuits with asymmetric pass transistors

Integrated circuit resistors with reduced parasitic capacitance

PMOS pass gate

Integrated circuits with asymmetric and stacked transistors

Integrated circuit transistors with multipart gate conductors

Memory element transistors with reversed-workfunction gate conductors

Integrated circuits with asymmetric and stacked transistors

Integrated circuits with nonvolatile memory elements

Very low voltage reference circuit

Mixed-gate metal-oxide-semiconductor varactors

Integrated circuits with asymmetric pass transistors

Stressed transistors with reduced leakage

Integrated circuits with nonvolatile memory elements

Memory elements with body bias control

Process/design methodology to enable high performance logic and ana...

Integrated circuits with metal-oxide-semiconductor transistors havi...

Patents Applicationslast 30 patents

Integrated Circuits with Asymmetric and Stacked Transistors

Integrated Circuits with Asymmetric and Stacked Transistors

VERY LOW VOLTAGE REFERENCE CIRCUIT

ASYMMETRIC METAL-OXIDE-SEMICONDUCTOR TRANSISTORS

INTEGRATED CIRCUIT TRANSISTORS

METAL-OXIDE-METAL CAPACITORS WITH BAR VIAS

PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANA...

VARACTORS WITH ENHANCED TUNING RANGES