Allan Robert Bertolet

Person

Williston, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Chip design process for wire bond and flip-chip package
- Patent number 6,204,074
- Issue date Mar 20, 2001
- International Business Machines Corporation
- Allan Bertolet
- G01 - MEASURING TESTING
Information Patent Grant
Glitch free delay line multiplexing technique
- Patent number 6,025,744
- Issue date Feb 15, 2000
- International Business Machines Corporation
- Allan R. Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for layout and schematic generation for heterogen...
- Patent number 5,910,733
- Issue date Jun 8, 1999
- International Business Machines Corporation
- Allan Robert Bertolet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Consolidated chip design for wire bond and flip-chip package techno...
- Patent number 5,844,317
- Issue date Dec 1, 1998
- International Business Machines Corporation
- Allan Bertolet
- G01 - MEASURING TESTING
Information Patent Grant
Programmable inverter circuit used in a programmable logic cell
- Patent number 5,781,032
- Issue date Jul 14, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell
- Patent number 5,748,009
- Issue date May 5, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for layout and schematic generation for heterogen...
- Patent number 5,734,582
- Issue date Mar 31, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable array I/O-routing resource
- Patent number 5,671,432
- Issue date Sep 23, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell having configurable gates and multiplexers
- Patent number 5,646,546
- Issue date Jul 8, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Branch isolation circuit for cascode voltage switch logic
- Patent number 5,389,836
- Issue date Feb 14, 1995
- International Business Machines Corporation
- Allan R. Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY

Allan Robert Bertolet

Person

Patents Grantslast 30 patents

Chip design process for wire bond and flip-chip package

Glitch free delay line multiplexing technique

Method and system for layout and schematic generation for heterogen...

Consolidated chip design for wire bond and flip-chip package techno...

Programmable inverter circuit used in a programmable logic cell

Programmable logic cell

Method and system for layout and schematic generation for heterogen...

Programmable array I/O-routing resource

Programmable logic cell having configurable gates and multiplexers

Branch isolation circuit for cascode voltage switch logic