Andrew Harvey Barr

Person

Roseville, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Computing with both lock-step and free-step processor modes
- Patent number 8,826,288
- Issue date Sep 2, 2014
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
External state cache for computer processor
- Patent number 8,812,781
- Issue date Aug 19, 2014
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System fan management based on system loading options for a system...
- Patent number 8,597,091
- Issue date Dec 3, 2013
- Hewlett-Packard Development Company, L.P.
- Ricardo Espinoza-Ibarra
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
System and method for testing a memory
- Patent number 8,176,250
- Issue date May 8, 2012
- Hewlett-Packard Development Company, L.P.
- Dale J. Shidla
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a memory with an expansion card using...
- Patent number 7,797,134
- Issue date Sep 14, 2010
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-availability cluster node removal and communication
- Patent number 7,664,994
- Issue date Feb 16, 2010
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
CPU register diagnostic testing
- Patent number 7,613,961
- Issue date Nov 3, 2009
- Hewlett-Packard Development Company, L.P.
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for selecting a primary resource in a redundan...
- Patent number 7,596,726
- Issue date Sep 29, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for automatically evaluating and allocating re...
- Patent number 7,586,946
- Issue date Sep 8, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compiler-scheduled CPU functional testing
- Patent number 7,581,210
- Issue date Aug 25, 2009
- Hewlett-Packard Development Company, L.P.
- Dale John Shidla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for managing the operating frequency of blades in...
- Patent number 7,548,971
- Issue date Jun 16, 2009
- Hewlett-Packard Development Company, L.P.
- Ricardo Espinoza-Ibarra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connector having a bypass capacitor and method for reducing the imp...
- Patent number 7,513,779
- Issue date Apr 7, 2009
- Hewlett-Packard Development Company, L.P.
- Andrew Harvey Barr
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Memory error ranking
- Patent number 7,493,534
- Issue date Feb 17, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for testing a component in a computer system usin...
- Patent number 7,487,399
- Issue date Feb 3, 2009
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective memory allocation
- Patent number 7,484,065
- Issue date Jan 27, 2009
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling multiple testing devices
- Patent number 7,469,370
- Issue date Dec 23, 2008
- Hewlett-Packard Development Company, L.P.
- Dale J. Shidla
- G01 - MEASURING TESTING
Information Patent Grant
Smart card for high-availability clustering
- Patent number 7,428,655
- Issue date Sep 23, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Rack equipment power purchase plan supervision system and method
- Patent number 7,424,624
- Issue date Sep 9, 2008
- Hewlett-Packard Development Company, L.P.
- Ricardo Espinoza-Ibarra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing a cell
- Patent number 7,418,367
- Issue date Aug 26, 2008
- Hewlett-Packard Development Company, L.P.
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime quality verification of execution units
- Patent number 7,415,700
- Issue date Aug 19, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-availability cluster with proactive maintenance
- Patent number 7,409,576
- Issue date Aug 5, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for the frequency management of computer systems...
- Patent number 7,389,435
- Issue date Jun 17, 2008
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rack equipment power pricing plan control system and method
- Patent number 7,386,744
- Issue date Jun 10, 2008
- Hewlett-Packard Development Company, L.P.
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rack equipment management system and method
- Patent number 7,363,516
- Issue date Apr 22, 2008
- Hewlett-Packard Development Company, L.P.
- Kirk Michael Bresniker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing a memory using DMA
- Patent number 7,350,109
- Issue date Mar 25, 2008
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory quality assurance
- Patent number 7,346,755
- Issue date Mar 18, 2008
- Hewlett-Packard Development, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heat sink fan management based on performance requirements
- Patent number 7,337,018
- Issue date Feb 26, 2008
- Hewlett-Packard Development Company, L.P.
- Ricardo Espinoza-Ibarra
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Memory scrubbing logic
- Patent number 7,328,380
- Issue date Feb 5, 2008
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for improving signal integrity in a high speed...
- Patent number 7,276,986
- Issue date Oct 2, 2007
- Hewlett-Packard Development Company, L.P.
- Andrew H. Barr
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of providing dynamic power redundancy based on a difference...
- Patent number 7,272,733
- Issue date Sep 18, 2007
- Hewlett-Packard Development Company, L.P.
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for selecting a primary resource in a redundan...
- Publication number 20070101203
- Publication date May 3, 2007
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for automatically evaluating and allocating re...
- Publication number 20070098014
- Publication date May 3, 2007
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Hardware configurable CPU with high availability mode
- Publication number 20070088979
- Publication date Apr 19, 2007
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing with both lock-step and free-step processor modes
- Publication number 20060245264
- Publication date Nov 2, 2006
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redundant I/O interface management
- Publication number 20060233204
- Publication date Oct 19, 2006
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
External state cache for computer processor
- Publication number 20060236034
- Publication date Oct 19, 2006
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Smart card for high-availability clustering
- Publication number 20060053330
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-availability cluster node removal and communication
- Publication number 20060053336
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High-availability cluster with proactive maintenance
- Publication number 20060053337
- Publication date Mar 9, 2006
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System fan management based on system loading options for a system...
- Publication number 20050259395
- Publication date Nov 24, 2005
- Ricardo Espinoza-lbarra
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Selective memory allocation
- Publication number 20050235124
- Publication date Oct 20, 2005
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rack equipment capacity on demand system and method
- Publication number 20050235137
- Publication date Oct 20, 2005
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rack equipment power pricing plan control system and method
- Publication number 20050203761
- Publication date Sep 15, 2005
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NODE MANAGEMENT IN HIGH-AVAILABILITY CLUSTER
- Publication number 20050188283
- Publication date Aug 25, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multi-state status reporting for high-availability cluster nodes
- Publication number 20050188265
- Publication date Aug 25, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Connector providing capacitive coupling
- Publication number 20050176301
- Publication date Aug 11, 2005
- Andrew Harvey Barr
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Cluster node status detection and communication
- Publication number 20050177779
- Publication date Aug 11, 2005
- Ken Gary Pomaranski
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Rack equipment power purchase plan supervision system and method
- Publication number 20050137894
- Publication date Jun 23, 2005
- Ricardo Espinoza-Ibarra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Equipment rack load modulation system and method
- Publication number 20050138440
- Publication date Jun 23, 2005
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for testing an interconnect in a computer system
- Publication number 20050125187
- Publication date Jun 9, 2005
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for detecting and rejecting high impedance fai...
- Publication number 20050116733
- Publication date Jun 2, 2005
- Andrew H. Barr
- G01 - MEASURING TESTING
Information Patent Application
System and method for testing a memory using DMA
- Publication number 20050120268
- Publication date Jun 2, 2005
- Andrew H. Barr
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for testing a memory with an expansion card using...
- Publication number 20050107987
- Publication date May 19, 2005
- Andrew H. Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for testing a component in a computer system usin...
- Publication number 20050102655
- Publication date May 12, 2005
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fault-tolerant multi-core microprocessing
- Publication number 20050102565
- Publication date May 12, 2005
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for testing a cell
- Publication number 20050096875
- Publication date May 5, 2005
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for testing a component in a computer system usin...
- Publication number 20050096863
- Publication date May 5, 2005
- Ken G. Pomaranski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit board and method in which the impedance of a transmission-p...
- Publication number 20050083147
- Publication date Apr 21, 2005
- Andrew Harvey Barr
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
CPU register diagnostic testing
- Publication number 20050080594
- Publication date Apr 14, 2005
- Andrew Harvey Barr
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Runtime quality verification of execution units
- Publication number 20050081191
- Publication date Apr 14, 2005
- Ken Gary Pomaranski
- G06 - COMPUTING CALCULATING COUNTING

Andrew Harvey Barr

Person

Patents Grantslast 30 patents

Computing with both lock-step and free-step processor modes

External state cache for computer processor

System fan management based on system loading options for a system...

System and method for testing a memory

System and method for testing a memory with an expansion card using...

High-availability cluster node removal and communication

CPU register diagnostic testing

Method and apparatus for selecting a primary resource in a redundan...

Method and apparatus for automatically evaluating and allocating re...

Compiler-scheduled CPU functional testing

System and method for managing the operating frequency of blades in...

Connector having a bypass capacitor and method for reducing the imp...

Memory error ranking

System and method for testing a component in a computer system usin...

Selective memory allocation

Enabling multiple testing devices

Smart card for high-availability clustering

Rack equipment power purchase plan supervision system and method

System and method for testing a cell

Runtime quality verification of execution units

High-availability cluster with proactive maintenance

System and method for the frequency management of computer systems...

Rack equipment power pricing plan control system and method

Rack equipment management system and method

System and method for testing a memory using DMA

Memory quality assurance

Heat sink fan management based on performance requirements

Memory scrubbing logic

Method and apparatus for improving signal integrity in a high speed...

Method of providing dynamic power redundancy based on a difference...

Patents Applicationslast 30 patents

Method and apparatus for selecting a primary resource in a redundan...

Method and apparatus for automatically evaluating and allocating re...

Hardware configurable CPU with high availability mode

Computing with both lock-step and free-step processor modes

Redundant I/O interface management

External state cache for computer processor

Smart card for high-availability clustering

High-availability cluster node removal and communication

High-availability cluster with proactive maintenance

System fan management based on system loading options for a system...

Selective memory allocation

Rack equipment capacity on demand system and method

Rack equipment power pricing plan control system and method

NODE MANAGEMENT IN HIGH-AVAILABILITY CLUSTER

Multi-state status reporting for high-availability cluster nodes

Connector providing capacitive coupling

Cluster node status detection and communication

Rack equipment power purchase plan supervision system and method

Equipment rack load modulation system and method

System and method for testing an interconnect in a computer system

Apparatus and method for detecting and rejecting high impedance fai...

System and method for testing a memory using DMA

System and method for testing a memory with an expansion card using...

System and method for testing a component in a computer system usin...

Fault-tolerant multi-core microprocessing

System and method for testing a cell

System and method for testing a component in a computer system usin...

Circuit board and method in which the impedance of a transmission-p...

CPU register diagnostic testing

Runtime quality verification of execution units