Andrew M. Volk

Person

Granite Bay, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Random number generator
- Patent number 8,595,274
- Issue date Nov 26, 2013
- Intel Corporation
- Pravas Pradhan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Spread spectrum clock generator
- Patent number 8,045,666
- Issue date Oct 25, 2011
- Intel Corporation
- Vishnu Balraj
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Synchronous frequency synthesizer
- Patent number 7,808,283
- Issue date Oct 5, 2010
- Intel Corporation
- Praveen Dani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Measuring and identifying analog characteristics of a microelectron...
- Patent number 7,705,620
- Issue date Apr 27, 2010
- Intel Corporation
- Mukul Kelkar
- G01 - MEASURING TESTING
Information Patent Grant
Signal drive de-emphasis control for serial bus
- Patent number 7,568,127
- Issue date Jul 28, 2009
- Intel Corporation
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DC-to-DC voltage converter
- Patent number 7,554,312
- Issue date Jun 30, 2009
- Intel Corporation
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuitry and method to measure a duty cycle of a clock signal
- Patent number 7,479,777
- Issue date Jan 20, 2009
- Intel Corporation
- Mukul Kelkar
- G01 - MEASURING TESTING
Information Patent Grant
Fast lock scheme for phase locked loops and delay locked loops
- Patent number 7,466,174
- Issue date Dec 16, 2008
- Intel Corporation
- Sridhar R. Tirumalai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for minimizing leakage current in semiconducto...
- Patent number 7,406,609
- Issue date Jul 29, 2008
- Intel Corporation
- Lawrence S. Uzelac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining an optimal sampling clock
- Patent number 7,245,682
- Issue date Jul 17, 2007
- Intel Corporation
- Jen-Tai Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for low latency power management on a serial d...
- Patent number 7,203,853
- Issue date Apr 10, 2007
- Intel Corporation
- Andrew W. Martwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to control an on die voltage regulator
- Patent number 7,181,631
- Issue date Feb 20, 2007
- Intel Corporation
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power start-up circuit for current mirror based reference gener...
- Patent number 7,157,894
- Issue date Jan 2, 2007
- Intel Corporation
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Grant
On die voltage regulator
- Patent number 7,126,798
- Issue date Oct 24, 2006
- Intel Corporation
- Michael D. Piorun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for reducing the effects of simultaneously switch...
- Patent number 6,971,040
- Issue date Nov 29, 2005
- Intel Corporation
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing and aligning differing clock domains
- Patent number 6,963,991
- Issue date Nov 8, 2005
- Intel Corporation
- Kevin M. Hill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for generating a clock signal
- Patent number 6,960,950
- Issue date Nov 1, 2005
- Intel Corporation
- Prasanna C. Shah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for reducing sub-threshold off current for a r...
- Patent number 6,957,354
- Issue date Oct 18, 2005
- Intel Corporation
- Lawrence S. Uzelac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On die voltage regulator
- Patent number 6,940,163
- Issue date Sep 6, 2005
- Intel Corporation
- Michael D. Piorun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for timing-dependant transfers using FIFOs
- Patent number 6,928,494
- Issue date Aug 9, 2005
- Intel Corporation
- Andrew M. Volk
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage reference generator
- Patent number 6,924,692
- Issue date Aug 2, 2005
- Intel Corporation
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Grant
Cross-clock domain data transfer method and apparatus
- Patent number 6,915,399
- Issue date Jul 5, 2005
- Intel Corporation
- David J. McDonnell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and methods for automatically producing a clock signal that...
- Patent number 6,794,919
- Issue date Sep 21, 2004
- Intel Corporation
- Andrew M. Volk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Duty cycle tuner for low power real time clock oscillator
- Patent number 6,791,428
- Issue date Sep 14, 2004
- Intel Corporation
- Chinnugounder Senthilkumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input-output bus interface to bridge different process technologies
- Patent number 6,777,975
- Issue date Aug 17, 2004
- Intel Corporation
- Sanjay Dabral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power self-biasing oscillator circuit
- Patent number 6,774,735
- Issue date Aug 10, 2004
- Intel Corporation
- Chinnugounder Senthilkumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic swing voltage adjustment
- Patent number 6,693,450
- Issue date Feb 17, 2004
- Intel Corporation
- Andrew M. Volk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for reduced glitch energy in digital-to-analog converter
- Patent number 6,664,906
- Issue date Dec 16, 2003
- Intel Corporation
- Andrew M. Volk
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast re-synchronization of independent domain clocks after powerdow...
- Patent number 6,662,305
- Issue date Dec 9, 2003
- Intel Corporation
- Joe H. Salmon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer with compensating drive strength
- Patent number 6,624,662
- Issue date Sep 23, 2003
- Intel Corporation
- Andrew M. Volk
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SYNCHRONOUS FREQUENCY SYNTHESIZER
- Publication number 20100073035
- Publication date Mar 25, 2010
- Praveen Dani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM NUMBER GENERATOR
- Publication number 20090172056
- Publication date Jul 2, 2009
- Intel Corporation
- Pravas Pradhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Spread spectrum clock generator
- Publication number 20080231331
- Publication date Sep 25, 2008
- Vishnu Balraj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuitry and method to measure a duty cycle of a clock signal
- Publication number 20080162062
- Publication date Jul 3, 2008
- Mukul Kelkar
- G01 - MEASURING TESTING
Information Patent Application
Fast lock scheme for phase locked loops and delay locked loops
- Publication number 20070229127
- Publication date Oct 4, 2007
- Sridhar R. Tirumalai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Measuring and identifying analog characteristics of a microelectron...
- Publication number 20070229106
- Publication date Oct 4, 2007
- Mukul Kelkar
- G01 - MEASURING TESTING
Information Patent Application
Signal drive de-emphasis control for serial bus
- Publication number 20060179372
- Publication date Aug 10, 2006
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Two-window recovered clock jitter analysis
- Publication number 20060133469
- Publication date Jun 22, 2006
- Dan S. Froelich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for reducing the effects of simultaneously switch...
- Publication number 20060031697
- Publication date Feb 9, 2006
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for minimizing leakage current in semiconducto...
- Publication number 20060005059
- Publication date Jan 5, 2006
- Intel Corporation, a California corporation
- Lawrence S. Uzelac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage reference generator
- Publication number 20050231272
- Publication date Oct 20, 2005
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Application
Current control circuit
- Publication number 20050003764
- Publication date Jan 6, 2005
- Intel Corporation
- Michael D. Piorun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage reference generator
- Publication number 20040263240
- Publication date Dec 30, 2004
- Intel Corporation
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Application
DC-to-DC voltage converter
- Publication number 20040268158
- Publication date Dec 30, 2004
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Application
On die voltage regulator
- Publication number 20040240309
- Publication date Dec 2, 2004
- Michael D. Piorun
- G05 - CONTROLLING REGULATING
Information Patent Application
Circuit and method for generating a clock signal
- Publication number 20040189359
- Publication date Sep 30, 2004
- Prasanna C. Shah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mechanism to control an on die voltage regulator
- Publication number 20040193927
- Publication date Sep 30, 2004
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low power start-up circuit for current mirror based reference gener...
- Publication number 20040124823
- Publication date Jul 1, 2004
- Robert Fulton
- G05 - CONTROLLING REGULATING
Information Patent Application
On die voltage regulator
- Publication number 20040124510
- Publication date Jul 1, 2004
- Michael D. Piorun
- G05 - CONTROLLING REGULATING
Information Patent Application
Duty cycle tuner for low power real time clock oscillator
- Publication number 20040124934
- Publication date Jul 1, 2004
- Chinnugounder Senthilkumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and method for low latency power management on a serial d...
- Publication number 20040103333
- Publication date May 27, 2004
- Andrew W. Martwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Determining an optimal sampling clock
- Publication number 20040062329
- Publication date Apr 1, 2004
- Jen-Tai Hsu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for reducing sub-threshold off current for a r...
- Publication number 20040054940
- Publication date Mar 18, 2004
- Intel Corporation, a California Corporation
- Lawrence S. Uzelac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing and aligning differing clock domains
- Publication number 20030226052
- Publication date Dec 4, 2003
- Kevin M. Hill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low power oscillator circuit
- Publication number 20030132741
- Publication date Jul 17, 2003
- Chinnugounder Senthilkumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW SUPPLY VOLTAGE DIFFERENTIAL SIGNAL DRIVER
- Publication number 20030122593
- Publication date Jul 3, 2003
- Andrew M. Volk
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for local parameter variation compensation
- Publication number 20030006781
- Publication date Jan 9, 2003
- Thomas To (Hing-Yan To)
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and system for reducing the effects of simultaneously switch...
- Publication number 20020199126
- Publication date Dec 26, 2002
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual clock domain read fifo
- Publication number 20020129196
- Publication date Sep 12, 2002
- Andrew M. Volk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High impedance current mode voltage scalable driver
- Publication number 20020109493
- Publication date Aug 15, 2002
- Garrett W. Hall
- G05 - CONTROLLING REGULATING

Andrew M. Volk

Person

Patents Grantslast 30 patents

Random number generator

Spread spectrum clock generator

Synchronous frequency synthesizer

Measuring and identifying analog characteristics of a microelectron...

Signal drive de-emphasis control for serial bus

DC-to-DC voltage converter

Circuitry and method to measure a duty cycle of a clock signal

Fast lock scheme for phase locked loops and delay locked loops

Method and apparatus for minimizing leakage current in semiconducto...

Determining an optimal sampling clock

Apparatus and method for low latency power management on a serial d...

Mechanism to control an on die voltage regulator

Low power start-up circuit for current mirror based reference gener...

On die voltage regulator

Method and system for reducing the effects of simultaneously switch...

Synchronizing and aligning differing clock domains

Circuit and method for generating a clock signal

Method and apparatus for reducing sub-threshold off current for a r...

On die voltage regulator

Method and apparatus for timing-dependant transfers using FIFOs

Voltage reference generator

Cross-clock domain data transfer method and apparatus

Devices and methods for automatically producing a clock signal that...

Duty cycle tuner for low power real time clock oscillator

Input-output bus interface to bridge different process technologies

Low power self-biasing oscillator circuit

Dynamic swing voltage adjustment

Apparatus for reduced glitch energy in digital-to-analog converter

Fast re-synchronization of independent domain clocks after powerdow...

Buffer with compensating drive strength

Patents Applicationslast 30 patents

SYNCHRONOUS FREQUENCY SYNTHESIZER

RANDOM NUMBER GENERATOR

Spread spectrum clock generator

Circuitry and method to measure a duty cycle of a clock signal

Fast lock scheme for phase locked loops and delay locked loops

Measuring and identifying analog characteristics of a microelectron...

Signal drive de-emphasis control for serial bus

Two-window recovered clock jitter analysis

Method and system for reducing the effects of simultaneously switch...

Method and apparatus for minimizing leakage current in semiconducto...

Voltage reference generator

Current control circuit

Voltage reference generator

DC-to-DC voltage converter

On die voltage regulator

Circuit and method for generating a clock signal

Mechanism to control an on die voltage regulator

Low power start-up circuit for current mirror based reference gener...

On die voltage regulator

Duty cycle tuner for low power real time clock oscillator

Apparatus and method for low latency power management on a serial d...

Determining an optimal sampling clock

Method and apparatus for reducing sub-threshold off current for a r...

Synchronizing and aligning differing clock domains

Low power oscillator circuit

LOW SUPPLY VOLTAGE DIFFERENTIAL SIGNAL DRIVER

Method and apparatus for local parameter variation compensation

Method and system for reducing the effects of simultaneously switch...

Dual clock domain read fifo

High impedance current mode voltage scalable driver