Anil Pothireddy

Person

Hyderabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Implementing hierarchical high radix switch with timesliced crossbar
- Patent number 9,667,564
- Issue date May 30, 2017
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Simultaneous transfers from a single input link to multiple output...
- Patent number 9,479,455
- Issue date Oct 25, 2016
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Simultaneous transfers from a single input link to multiple output...
- Patent number 9,467,396
- Issue date Oct 11, 2016
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated link-based data recorder for semiconductor chip
- Patent number 9,207,999
- Issue date Dec 8, 2015
- International Business Machines Corporation
- Scott D. Clark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated link-based data recorder for semiconductor chip
- Patent number 9,110,742
- Issue date Aug 18, 2015
- International Business Machines Corporation
- Scott D. Clark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Weightage-based scheduling for hierarchical switching fabrics
- Patent number 8,984,206
- Issue date Mar 17, 2015
- International Business Machines Corporation
- Nikolaos Chrysos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input buffered switching device including bypass logic
- Patent number 8,902,899
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Translating between an ethernet protocol and a converged enhanced e...
- Patent number 8,902,750
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Claude Basso
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Translation between a first communication protocol and a second com...
- Patent number 8,589,776
- Issue date Nov 19, 2013
- International Business Machines Corporation
- Jean L. Calvignac
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cache memory including a predict buffer
- Patent number 8,316,187
- Issue date Nov 20, 2012
- International Business Machines Corporation
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Finite state machine error recovery
- Patent number 8,161,366
- Issue date Apr 17, 2012
- International Business Machines Corporation
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing latency in data transfer between asynchronous clock domains
- Patent number 8,132,036
- Issue date Mar 6, 2012
- International Business Machines Corporation
- Anil Pothireddy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Encoding a gray code sequence for an odd length sequence
- Patent number 7,916,048
- Issue date Mar 29, 2011
- International Business Machines Corporation
- Jayashri A. Basappa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
In system diagnostics through scan matrix
- Patent number 7,870,448
- Issue date Jan 11, 2011
- International Business Machines Corporation
- Baalaji Ramamoorthy Konda
- G01 - MEASURING TESTING
Information Patent Grant
Efficient load/store buffer memory management in a computer communi...
- Patent number 7,853,738
- Issue date Dec 14, 2010
- International Business Machines Corporation
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating a gray code for an odd length sequence using a virtual s...
- Patent number 7,667,629
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Anil Pothireddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Generating a Gray code sequence for any even length using an interm...
- Patent number 7,518,535
- Issue date Apr 14, 2009
- International Business Machines Corporation
- Anil Pothireddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of asynchronously transmitting data between clock domains
- Patent number 7,500,132
- Issue date Mar 3, 2009
- International Business Machines Corporation
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SIMULTANEOUS TRANSFERS FROM A SINGLE INPUT LINK TO MULTIPLE OUTPUT...
- Publication number 20150295858
- Publication date Oct 15, 2015
- International Business Machines Corporation
- Nikolaos CHRYSOS
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SIMULTANEOUS TRANSFERS FROM A SINGLE INPUT LINK TO MULTIPLE OUTPUT...
- Publication number 20150295857
- Publication date Oct 15, 2015
- International Business Machines Corporation
- Nikolaos CHRYSOS
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IMPLEMENTING HIERARCHICAL HIGH RADIX SWITCH WITH TIMESLICED CROSSBAR
- Publication number 20150063348
- Publication date Mar 5, 2015
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED LINK-BASED DATA RECORDER FOR SEMICONDUCTOR CHIP
- Publication number 20140359641
- Publication date Dec 4, 2014
- International Business Machines Corporation
- Scott D. Clark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED LINK-BASED DATA RECORDER FOR SEMICONDUCTOR CHIP
- Publication number 20140359639
- Publication date Dec 4, 2014
- Scott D. Clark
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT BUFFERED SWITCHING DEVICE INCLUDING BYPASS LOGIC
- Publication number 20140226675
- Publication date Aug 14, 2014
- International Business Machines Corporation
- Nikolaos Chrysos
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
WEIGHTAGE-BASED SCHEDULING FOR HIERARCHICAL SWITCHING FABRICS
- Publication number 20140122771
- Publication date May 1, 2014
- International Business Machines Corporation
- Nikolaos Chrysos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translation Between A First Communication Protocol And A Second Com...
- Publication number 20110302481
- Publication date Dec 8, 2011
- International Business Machines Corporation
- Jean L. Calvignac
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Translating Between An Ethernet Protocol And A Converged Enhanced E...
- Publication number 20110299394
- Publication date Dec 8, 2011
- International Business Machines Corporation
- Claude Basso
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ENCODING A GRAY CODE SEQUENCE FOR AN ODD LENGTH SEQUENCE
- Publication number 20100134332
- Publication date Jun 3, 2010
- International Business Machines Corporation
- Jayashri A. Basappa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Efficient Load/Store Buffer Memory Management in a Computer Communi...
- Publication number 20100042762
- Publication date Feb 18, 2010
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING A GRAY CODE FOR AN ODD LENGTH SEQUENCE USING A VIRTUAL S...
- Publication number 20090295608
- Publication date Dec 3, 2009
- Anil Pothireddy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and System for Reducing Latency in Data Transfer Between Asy...
- Publication number 20090271651
- Publication date Oct 29, 2009
- International Business Machines Corporation
- Anil Pothireddy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IN SYSTEM DIAGNOSTICS THROUGH SCAN MATRIX
- Publication number 20090158105
- Publication date Jun 18, 2009
- Baalaji Ramamoorthy Konda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINITE STATE MACHINE ERROR RECOVERY
- Publication number 20090144588
- Publication date Jun 4, 2009
- Anil Pothireddy
- G06 - COMPUTING CALCULATING COUNTING

Anil Pothireddy

Person

Patents Grantslast 30 patents

Implementing hierarchical high radix switch with timesliced crossbar

Simultaneous transfers from a single input link to multiple output...

Simultaneous transfers from a single input link to multiple output...

Integrated link-based data recorder for semiconductor chip

Integrated link-based data recorder for semiconductor chip

Weightage-based scheduling for hierarchical switching fabrics

Input buffered switching device including bypass logic

Translating between an ethernet protocol and a converged enhanced e...

Translation between a first communication protocol and a second com...

Cache memory including a predict buffer

Finite state machine error recovery

Reducing latency in data transfer between asynchronous clock domains

Encoding a gray code sequence for an odd length sequence

In system diagnostics through scan matrix

Efficient load/store buffer memory management in a computer communi...

Generating a gray code for an odd length sequence using a virtual s...

Generating a Gray code sequence for any even length using an interm...

Method of asynchronously transmitting data between clock domains

Patents Applicationslast 30 patents

SIMULTANEOUS TRANSFERS FROM A SINGLE INPUT LINK TO MULTIPLE OUTPUT...

SIMULTANEOUS TRANSFERS FROM A SINGLE INPUT LINK TO MULTIPLE OUTPUT...

IMPLEMENTING HIERARCHICAL HIGH RADIX SWITCH WITH TIMESLICED CROSSBAR

INTEGRATED LINK-BASED DATA RECORDER FOR SEMICONDUCTOR CHIP

INTEGRATED LINK-BASED DATA RECORDER FOR SEMICONDUCTOR CHIP

INPUT BUFFERED SWITCHING DEVICE INCLUDING BYPASS LOGIC

WEIGHTAGE-BASED SCHEDULING FOR HIERARCHICAL SWITCHING FABRICS

Translation Between A First Communication Protocol And A Second Com...

Translating Between An Ethernet Protocol And A Converged Enhanced E...

ENCODING A GRAY CODE SEQUENCE FOR AN ODD LENGTH SEQUENCE

Efficient Load/Store Buffer Memory Management in a Computer Communi...

GENERATING A GRAY CODE FOR AN ODD LENGTH SEQUENCE USING A VIRTUAL S...

Method and System for Reducing Latency in Data Transfer Between Asy...

IN SYSTEM DIAGNOSTICS THROUGH SCAN MATRIX

FINITE STATE MACHINE ERROR RECOVERY