Ankur GOEl

Person

Bangaiore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Area-efficient process-and-temperature-adaptive self-time scheme fo...
- Patent number 9,424,900
- Issue date Aug 23, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with separately controlled sense amplifiers
- Patent number 9,384,790
- Issue date Jul 5, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Grant
Area-efficient, high-speed, dynamic-circuit-based sensing scheme fo...
- Patent number 9,251,889
- Issue date Feb 2, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method with auxiliary I/O line assi...
- Patent number 9,177,620
- Issue date Nov 3, 2015
- PS4 Luxco S.A.R.L.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Segmented memory having power-saving mode
- Patent number 8,773,942
- Issue date Jul 8, 2014
- LSI Corporation
- Richard J. Stephani
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with control circuitry for generating a reset signal...
- Patent number 8,730,750
- Issue date May 20, 2014
- LSI Corporation
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual rail power supply scheme for memories
- Patent number 8,724,421
- Issue date May 13, 2014
- LSI Corporation
- Donald A. Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device and method with auxiliary I/O line assi...
- Patent number 8,699,281
- Issue date Apr 15, 2014
- Elpida Memory Inc.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with area efficient power gating circuitry
- Patent number 8,462,562
- Issue date Jun 11, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with trimmable power gating capabilities
- Patent number 8,427,886
- Issue date Apr 23, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method with auxiliary I/O line assi...
- Patent number 8,259,509
- Issue date Sep 4, 2012
- Elpida Memory, Inc.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device that can relieve defective address
- Patent number 7,826,241
- Issue date Nov 2, 2010
- Elpida Memory, Inc.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
8-T SRAM cell circuit, system and method for low leakage current
- Patent number 7,619,916
- Issue date Nov 17, 2009
- STMicroelectronics Pvt. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier providing low capacitance with reduced resolution time
- Patent number 7,545,180
- Issue date Jun 9, 2009
- STMicroelectronics Pvt. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
AREA-EFFICIENT, HIGH-SPEED, DYNAMIC-CIRCUIT-BASED SENSING SCHEME FO...
- Publication number 20150206578
- Publication date Jul 23, 2015
- LSI Corporation
- Ankur GOEL
- G11 - INFORMATION STORAGE
Information Patent Application
AREA-EFFICIENT PROCESS-AND-TEMPERATURE-ADAPTIVE SELF-TIME SCHEME FO...
- Publication number 20150155021
- Publication date Jun 4, 2015
- LSI Corporation
- Ankur GOEL
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASS...
- Publication number 20140204692
- Publication date Jul 24, 2014
- Elpida Memory, Inc.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH CONTROL CIRCUITRY FOR GENERATING A RESET SIGNAL...
- Publication number 20140119130
- Publication date May 1, 2014
- LSI Corporation
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
SEGMENTED MEMORY HAVING POWER-SAVING MODE
- Publication number 20140119147
- Publication date May 1, 2014
- LSI Corporation
- Richard J. Stephani
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR AN ADAPTIVE NEGATIVE-BOOST WRITE ASSIST CIRCU...
- Publication number 20140112062
- Publication date Apr 24, 2014
- LSI Corporation
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SEPARATELY CONTROLLED SENSE AMPLIFIERS
- Publication number 20140029366
- Publication date Jan 30, 2014
- LSI Corporation
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
DUAL RAIL POWER SUPPLY SCHEME FOR MEMORIES
- Publication number 20140025981
- Publication date Jan 23, 2014
- LSI Corporation
- Donald A. Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-Speed Sensing Scheme for Memory
- Publication number 20140003160
- Publication date Jan 2, 2014
- LSI Corporation
- Manish Trivedi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH AREA EFFICIENT POWER GATING CIRCUITRY
- Publication number 20130128676
- Publication date May 23, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH TRIMMABLE POWER GATING CAPABILITIES
- Publication number 20130016573
- Publication date Jan 17, 2013
- LSI Corporation
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASSI...
- Publication number 20120281486
- Publication date Nov 8, 2012
- Elpida Memory, Inc.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device and method for cancelling offset voltage of se...
- Publication number 20110133809
- Publication date Jun 9, 2011
- Elpida Memory, Inc.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASSI...
- Publication number 20100039871
- Publication date Feb 18, 2010
- Elpida Memory, Inc.
- Shetti Shanmukheshwara Rao
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device that can relieve defective address
- Publication number 20090168478
- Publication date Jul 2, 2009
- Elpida Memory, Inc.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Application
8-T SRAM cell circuit, system and method for low leakage current
- Publication number 20080151605
- Publication date Jun 26, 2008
- STMicroelectronics Pvt. Ltd.
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER PROVIDING LOW CAPACITANCE WITH REDUCED RESOLUTION TIME
- Publication number 20080143390
- Publication date Jun 19, 2008
- STMICROELECTRONICS PVT. LTD.
- Ankur Goel
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Area-efficient process-and-temperature-adaptive self-time scheme fo...

Memory device with separately controlled sense amplifiers

Area-efficient, high-speed, dynamic-circuit-based sensing scheme fo...

Semiconductor memory device and method with auxiliary I/O line assi...

Segmented memory having power-saving mode

Memory device with control circuitry for generating a reset signal...

Dual rail power supply scheme for memories

Semiconductor memory device and method with auxiliary I/O line assi...

Memory device with area efficient power gating circuitry

Memory device with trimmable power gating capabilities

Semiconductor memory device and method with auxiliary I/O line assi...

Semiconductor memory device that can relieve defective address

8-T SRAM cell circuit, system and method for low leakage current

Sense amplifier providing low capacitance with reduced resolution time

Patents Applicationslast 30 patents

AREA-EFFICIENT, HIGH-SPEED, DYNAMIC-CIRCUIT-BASED SENSING SCHEME FO...

AREA-EFFICIENT PROCESS-AND-TEMPERATURE-ADAPTIVE SELF-TIME SCHEME FO...

SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASS...

MEMORY DEVICE WITH CONTROL CIRCUITRY FOR GENERATING A RESET SIGNAL...

SEGMENTED MEMORY HAVING POWER-SAVING MODE

METHOD AND SYSTEM FOR AN ADAPTIVE NEGATIVE-BOOST WRITE ASSIST CIRCU...

MEMORY DEVICE WITH SEPARATELY CONTROLLED SENSE AMPLIFIERS

DUAL RAIL POWER SUPPLY SCHEME FOR MEMORIES

High-Speed Sensing Scheme for Memory

MEMORY DEVICE WITH AREA EFFICIENT POWER GATING CIRCUITRY

MEMORY DEVICE WITH TRIMMABLE POWER GATING CAPABILITIES

SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASSI...

Semiconductor device and method for cancelling offset voltage of se...

SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH AUXILIARY I/O LINE ASSI...

Semiconductor memory device that can relieve defective address

8-T SRAM cell circuit, system and method for low leakage current

SENSE AMPLIFIER PROVIDING LOW CAPACITANCE WITH REDUCED RESOLUTION TIME