Antonio B. DIMAANO JR.

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-layer leadless semiconductor package and method of manufactur...
- Patent number 10,573,590
- Issue date Feb 25, 2020
- UTAC HEADQUARTERS PTE. LTD.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 10,403,592
- Issue date Sep 3, 2019
- United Test & Assembly Center Ltd.
- Yongbo Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 10,354,934
- Issue date Jul 16, 2019
- UTAC HEADQUARTERS PTE. LTD.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,978,658
- Issue date May 22, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnect
- Patent number 9,960,130
- Issue date May 1, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Rui Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,881,863
- Issue date Jan 30, 2018
- UTAC HEADQUARTERS PTE. LTD.
- Chuen Khiang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,786,625
- Issue date Oct 10, 2017
- United Test & Assembly Center Ltd.
- Yongbo Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,589,875
- Issue date Mar 7, 2017
- UTAC HEADQUARTERS PTE. LTD.
- Chuen Khiang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having routing traces therein
- Patent number 9,564,387
- Issue date Feb 7, 2017
- UTAC HEADQUARTERS PTE. LTD.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,508,623
- Issue date Nov 29, 2016
- UTAC HEADQUARTERS PTE. LTD.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe area array packaging technology
- Patent number 9,472,532
- Issue date Oct 18, 2016
- UTAC HEADQUARTERS PTE. LTD.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,136,142
- Issue date Sep 15, 2015
- United Test & Assembly Center Ltd.
- Chuen Khiang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,087,777
- Issue date Jul 21, 2015
- United Test & Assembly Center Ltd.
- Yongbo Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leadframe area array packaging technology
- Patent number 9,023,690
- Issue date May 5, 2015
- United Test and Assembly Center
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 8,716,873
- Issue date May 6, 2014
- United Test & Assembly Center Ltd.
- Chuen Khiang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with multi-surface die attach pad
- Patent number 8,536,689
- Issue date Sep 17, 2013
- Stats Chippac Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit leaded stacked package system
- Patent number 8,513,542
- Issue date Aug 20, 2013
- Stats Chippac Ltd.
- Heap Hoe Kuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system employing a support structure wit...
- Patent number 8,422,243
- Issue date Apr 16, 2013
- Stats Chippac Ltd.
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with warp-free chip
- Patent number 8,421,197
- Issue date Apr 16, 2013
- Stats Chippac Ltd.
- Byung Tai Do
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package design and method of manufacture for chip grid array
- Patent number 7,456,496
- Issue date Nov 25, 2008
- Advanpack Solutions PTE LTD
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package design and method of manufacture for chip grid array
- Patent number 6,929,981
- Issue date Aug 16, 2005
- Advanpack Solutions PTE, Ltd.
- Tan Kim Hwee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip grid array package design and method of manufacture
- Patent number 6,734,039
- Issue date May 11, 2004
- Advanpack Solutions PTE LTD
- Tan Kim Hwee
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Coplanarity inspection at the singulation process
- Patent number 6,543,127
- Issue date Apr 8, 2003
- ST Assembly Test Service Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20190348387
- Publication date Nov 14, 2019
- UTAC Headquarters Pte. Ltd.
- Yongbo YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20180240726
- Publication date Aug 23, 2018
- UTAC Headquarters Pte. Ltd.
- Nathapong SUTHIWONGSUNTHORN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LAYER LEADLESS SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTUR...
- Publication number 20180114749
- Publication date Apr 26, 2018
- UTAC Headquarters Pte. Ltd.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20180033759
- Publication date Feb 1, 2018
- UTAC Headquarters Pte. Ltd.
- Yongbo YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20170148722
- Publication date May 25, 2017
- UTAC Headquarters Pte. Ltd.
- Chuen Khiang WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20170077007
- Publication date Mar 16, 2017
- UTAC Headquarters Pte. Ltd.
- Nathapong SUTHIWONGSUNTHORN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT
- Publication number 20160233179
- Publication date Aug 11, 2016
- United Test & Assembly Center Ltd.
- Rui HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE HAVING ROUTING TRACES THEREIN
- Publication number 20160064310
- Publication date Mar 3, 2016
- UTAC Headquarters Pte. Ltd.
- Saravuth Sirinorakul
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20150380346
- Publication date Dec 31, 2015
- UTAC Headquarters Pte. Ltd.
- Chuen Khiang WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20150357256
- Publication date Dec 10, 2015
- UTAC Headquarters Pte. Ltd.
- Nathapong SUTHIWONGSUNTHORN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20150325511
- Publication date Nov 12, 2015
- UTAC Headquarters Pte. Ltd.
- Yongbo YANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEADFRAME AREA ARRAY PACKAGING TECHNOLOGY
- Publication number 20150214187
- Publication date Jul 30, 2015
- United Test and Assembly Center, Ltd.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20140264789
- Publication date Sep 18, 2014
- United Test & Assembly Center Ltd.
- Yongbo Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20140227832
- Publication date Aug 14, 2014
- United Test & Assembly Center Ltd.
- Chuen Khiang WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LEADFRAME AREA ARRAY PACKAGING TECHNOLOGY
- Publication number 20140138808
- Publication date May 22, 2014
- United Test & Assembly Center Ltd.
- Antonio Bambalan Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONN...
- Publication number 20080203549
- Publication date Aug 28, 2008
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING A SUPPORT STRUCTURE WIT...
- Publication number 20080142938
- Publication date Jun 19, 2008
- STATS ChipPAC Ltd.
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK
- Publication number 20080111217
- Publication date May 15, 2008
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20080111215
- Publication date May 15, 2008
- STATS ChipPAC Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERLOCK
- Publication number 20080054421
- Publication date Mar 6, 2008
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STIFFENER
- Publication number 20080006926
- Publication date Jan 10, 2008
- STATS ChipPAC Ltd.
- Henry D. Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20080001263
- Publication date Jan 3, 2008
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT ENCAPSULATION SYSTEM WITH VENT
- Publication number 20070262423
- Publication date Nov 15, 2007
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
- Publication number 20070210443
- Publication date Sep 13, 2007
- STATS ChipPAC Ltd.
- Dioscoro A. Merilo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT LEADED STACKED PACKAGE SYSTEM
- Publication number 20070209834
- Publication date Sep 13, 2007
- STATS ChipPAC Ltd.
- Heap Hoe Kuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM
- Publication number 20070210424
- Publication date Sep 13, 2007
- STATS ChipPAC Ltd.
- Tsz Yin Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
- Publication number 20070200230
- Publication date Aug 30, 2007
- STATS ChipPAC Ltd.
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONN...
- Publication number 20070200257
- Publication date Aug 30, 2007
- STATS ChipPAC Ltd.
- Seng Guan Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
- Publication number 20070075404
- Publication date Apr 5, 2007
- STATS ChipPAC Ltd.
- Antonio B. Dimaano
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIRE SWEEP RESISTANT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD...
- Publication number 20070063354
- Publication date Mar 22, 2007
- STATS ChipPAC Ltd.
- Sheila Rima C. Magno
- H01 - BASIC ELECTRIC ELEMENTS

Antonio B. DIMAANO JR.

Person

Patents Grantslast 30 patents

Multi-layer leadless semiconductor package and method of manufactur...

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor packages and methods of packaging semiconductor devices

Reliable interconnect

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor package having routing traces therein

Semiconductor packages and methods of packaging semiconductor devices

Leadframe area array packaging technology

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor packages and methods of packaging semiconductor devices

Leadframe area array packaging technology

Semiconductor packages and methods of packaging semiconductor devices

Integrated circuit package system with multi-surface die attach pad

Integrated circuit leaded stacked package system

Integrated circuit package system employing a support structure wit...

Integrated circuit package system with warp-free chip

Package design and method of manufacture for chip grid array

Package design and method of manufacture for chip grid array

Semiconductor chip grid array package design and method of manufacture

Coplanarity inspection at the singulation process

Patents Applicationslast 30 patents

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

MULTI-LAYER LEADLESS SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTUR...

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

RELIABLE INTERCONNECT

SEMICONDUCTOR PACKAGE HAVING ROUTING TRACES THEREIN

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

LEADFRAME AREA ARRAY PACKAGING TECHNOLOGY

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

LEADFRAME AREA ARRAY PACKAGING TECHNOLOGY

STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONN...

INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING A SUPPORT STRUCTURE WIT...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH HEAT SINK

INTEGRATED CIRCUIT PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTERLOCK

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STIFFENER

INTEGRATED CIRCUIT PACKAGE SYSTEM

INTEGRATED CIRCUIT ENCAPSULATION SYSTEM WITH VENT

INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM

INTEGRATED CIRCUIT LEADED STACKED PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE IN PACKAGE SYSTEM

STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM

STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE INTERCONN...

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD

WIRE SWEEP RESISTANT SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD...