Armin Nuckel

Person

Neupotz, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method of transferring data between external devices and an array p...
- Patent number 10,152,320
- Issue date Dec 11, 2018
- Scientia Sol Mentis AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable logic integrated circuit having a multidimensional str...
- Patent number 9,690,747
- Issue date Jun 27, 2017
- PACT XPP Technologies, AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array processor having a segmented bus system
- Patent number 9,626,325
- Issue date Apr 18, 2017
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for transferring data between a processing devi...
- Patent number 9,411,532
- Issue date Aug 9, 2016
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor chip with flexible bus system
- Patent number 9,256,575
- Issue date Feb 9, 2016
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor bus and cache interconnection system
- Patent number 9,250,908
- Issue date Feb 2, 2016
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of processing data with an array of data processors accordin...
- Patent number 9,141,390
- Issue date Sep 22, 2015
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical cell array and bus system
- Patent number 9,047,440
- Issue date Jun 2, 2015
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for the translation of programs for reconfigurable architect...
- Patent number 8,869,121
- Issue date Oct 21, 2014
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable logic integrated circuit having a multidimensional str...
- Patent number 8,726,250
- Issue date May 13, 2014
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 8,471,593
- Issue date Jun 25, 2013
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration protocol and configuration unit communication
- Patent number 8,468,329
- Issue date Jun 18, 2013
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor chip including a plurality of cache elements connected to...
- Patent number 8,312,200
- Issue date Nov 13, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration protocol and configuration unit communication
- Patent number 8,301,872
- Issue date Oct 30, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for processing data
- Patent number 8,281,265
- Issue date Oct 2, 2012
- Martin Vorbach
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for interleaving a program over a plurality of cells
- Patent number 8,230,411
- Issue date Jul 24, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 8,058,899
- Issue date Nov 15, 2011
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for the translation of programs for reconfigurable architect...
- Patent number 7,996,827
- Issue date Aug 9, 2011
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for debugging reconfigurable architectures
- Patent number 7,840,842
- Issue date Nov 23, 2010
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for processing data
- Patent number 7,657,861
- Issue date Feb 2, 2010
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for processing data
- Patent number 7,657,877
- Issue date Feb 2, 2010
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic cell array and bus system
- Patent number 7,595,659
- Issue date Sep 29, 2009
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for debugging reconfigurable architectures
- Patent number 7,266,725
- Issue date Sep 4, 2007
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for translating programs for reconfigurable architectures
- Patent number 7,210,129
- Issue date Apr 24, 2007
- Pact XPP Technologies AG
- Frank May
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline configuration unit protocols and communication
- Patent number 7,003,660
- Issue date Feb 21, 2006
- Pact XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR TRANSFERRING DATA BETWEEN A PROCESSING DEVI...
- Publication number 20190102173
- Publication date Apr 4, 2019
- Scientia Sol Mentis AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array Processor Having a Segmented Bus System
- Publication number 20180300278
- Publication date Oct 18, 2018
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PROVIDING SUBAPPLICATIONS TO AN ARRAY OF ALUS
- Publication number 20170286364
- Publication date Oct 5, 2017
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Transferring Data between External Devices and an Array P...
- Publication number 20160357555
- Publication date Dec 8, 2016
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array Processor Having a Segmented Bus System
- Publication number 20160154758
- Publication date Jun 2, 2016
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Systems for Transferring Data between a Processing Devi...
- Publication number 20150261474
- Publication date Sep 17, 2015
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processor chip with flexible bus system
- Publication number 20150261722
- Publication date Sep 17, 2015
- PACT XPP TECHNOLOGIES AG
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...
- Publication number 20150100756
- Publication date Apr 9, 2015
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel Processing Array of Arithmetic Unit having a Barrier Instr...
- Publication number 20150033000
- Publication date Jan 29, 2015
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Processing Data with an Array of Data Processors Accordin...
- Publication number 20150026431
- Publication date Jan 22, 2015
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logical cell array and bus system
- Publication number 20140359254
- Publication date Dec 4, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...
- Publication number 20140337601
- Publication date Nov 13, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION
- Publication number 20140325175
- Publication date Oct 30, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-processor bus and cache interconnection system
- Publication number 20140310466
- Publication date Oct 16, 2014
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION
- Publication number 20120311301
- Publication date Dec 6, 2012
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC CELL ARRAY AND BUS SYSTEM
- Publication number 20120072699
- Publication date Mar 22, 2012
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR THE TRANSLATION OF PROGRAMS FOR RECONFIGURABLE ARCHITECT...
- Publication number 20110271264
- Publication date Nov 3, 2011
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...
- Publication number 20110012640
- Publication date Jan 20, 2011
- MARTIN VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...
- Publication number 20100287324
- Publication date Nov 11, 2010
- MARTIN VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...
- Publication number 20100228918
- Publication date Sep 9, 2010
- MARTIN VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PROCESSING DATA
- Publication number 20100095094
- Publication date Apr 15, 2010
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR PROCESSING DATA
- Publication number 20100070671
- Publication date Mar 18, 2010
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR TREATING AND PROCESSING DATA
- Publication number 20090210653
- Publication date Aug 20, 2009
- PACT XPP TECHNOLOGIES AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC CELL ARRAY AND BUS SYSTEM
- Publication number 20090146691
- Publication date Jun 11, 2009
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for debugging reconfigurable architectures
- Publication number 20090006895
- Publication date Jan 1, 2009
- Frank May
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Device for Treating and Processing Data
- Publication number 20070299993
- Publication date Dec 27, 2007
- PACT XPP Technologies AG
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and device for processing data
- Publication number 20060248317
- Publication date Nov 2, 2006
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipeline configuration protocol and configuration unit communication
- Publication number 20050223212
- Publication date Oct 6, 2005
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for the translation of programs for reconfigurable architect...
- Publication number 20050086649
- Publication date Apr 21, 2005
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processing method
- Publication number 20040243984
- Publication date Dec 2, 2004
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Armin Nuckel

Person

Patents Grantslast 30 patents

Method of transferring data between external devices and an array p...

Configurable logic integrated circuit having a multidimensional str...

Array processor having a segmented bus system

Methods and systems for transferring data between a processing devi...

Data processor chip with flexible bus system

Multi-processor bus and cache interconnection system

Method of processing data with an array of data processors accordin...

Logical cell array and bus system

Method for the translation of programs for reconfigurable architect...

Configurable logic integrated circuit having a multidimensional str...

Logic cell array and bus system

Pipeline configuration protocol and configuration unit communication

Processor chip including a plurality of cache elements connected to...

Pipeline configuration protocol and configuration unit communication

Method and device for processing data

Method for interleaving a program over a plurality of cells

Logic cell array and bus system

Method for the translation of programs for reconfigurable architect...

Method for debugging reconfigurable architectures

Method and device for processing data

Method for processing data

Logic cell array and bus system

Method for debugging reconfigurable architectures

Method for translating programs for reconfigurable architectures

Pipeline configuration unit protocols and communication

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR TRANSFERRING DATA BETWEEN A PROCESSING DEVI...

Array Processor Having a Segmented Bus System

METHOD FOR PROVIDING SUBAPPLICATIONS TO AN ARRAY OF ALUS

Method of Transferring Data between External Devices and an Array P...

Array Processor Having a Segmented Bus System

Methods and Systems for Transferring Data between a Processing Devi...

Data processor chip with flexible bus system

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...

Parallel Processing Array of Arithmetic Unit having a Barrier Instr...

Method of Processing Data with an Array of Data Processors Accordin...

Logical cell array and bus system

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...

PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION

Multi-processor bus and cache interconnection system

PIPELINE CONFIGURATION PROTOCOL AND CONFIGURATION UNIT COMMUNICATION

LOGIC CELL ARRAY AND BUS SYSTEM

METHOD FOR THE TRANSLATION OF PROGRAMS FOR RECONFIGURABLE ARCHITECT...

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...

CONFIGURABLE LOGIC INTEGRATED CIRCUIT HAVING A MULTIDIMENSIONAL STR...

METHOD FOR PROCESSING DATA

METHOD AND DEVICE FOR PROCESSING DATA

METHOD AND DEVICE FOR TREATING AND PROCESSING DATA

LOGIC CELL ARRAY AND BUS SYSTEM

Method for debugging reconfigurable architectures

Method and Device for Treating and Processing Data

Method and device for processing data

Pipeline configuration protocol and configuration unit communication

Method for the translation of programs for reconfigurable architect...

Data processing method