Arthur Tuminaro

Person

Lagrangeville, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Single clock dynamic compare circuit
- Patent number 8,233,331
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Yuen H. Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Global bit select circuit interface with dual read and write bit li...
- Patent number 7,463,537
- Issue date Dec 9, 2008
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit select circuit with dual read and write bit line pairs
- Patent number 7,336,546
- Issue date Feb 26, 2008
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit line restore timing scheme and circuit
- Patent number 7,272,030
- Issue date Sep 18, 2007
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Global bit line restore timing scheme and circuit
- Patent number 7,170,774
- Issue date Jan 30, 2007
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Local bit select with suppression of fast read before write
- Patent number 7,113,433
- Issue date Sep 26, 2006
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
Self timed bit and read/write pulse stretchers
- Patent number 7,006,403
- Issue date Feb 28, 2006
- International Business Machines Corp.
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable sense amplifier timing generator
- Patent number 6,958,943
- Issue date Oct 25, 2005
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Grant
CMOS sense amplifier
- Patent number 5,627,484
- Issue date May 6, 1997
- International Business Machines Corporation
- Arthur D. Tuminaro
- G11 - INFORMATION STORAGE
Information Patent Grant
Latch and data out driver for memory arrays
- Patent number 5,239,506
- Issue date Aug 24, 1993
- International Business Machines Corporation
- William R. Dachtera
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SINGLE CLOCK DYNAMIC COMPARE CIRCUIT
- Publication number 20110298500
- Publication date Dec 8, 2011
- International Business Machines Corporation
- Yuen H. Chan
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Global Bit Select Circuit Interface with Dual Read and Write Bit Li...
- Publication number 20080056052
- Publication date Mar 6, 2008
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Global Bit Line Restore Timing Scheme and Circuit
- Publication number 20070058421
- Publication date Mar 15, 2007
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Global bit select circuit with dual read and write bit line pairs
- Publication number 20060176753
- Publication date Aug 10, 2006
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Local bit select with suppression of fast read before write
- Publication number 20060176729
- Publication date Aug 10, 2006
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Global bit line restore timing scheme and circuit
- Publication number 20060176730
- Publication date Aug 10, 2006
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE SENSE AMPLIFIER TIMING GENERATOR
- Publication number 20050254317
- Publication date Nov 17, 2005
- International Business Machines Corporation
- Yuen H. Chan
- G11 - INFORMATION STORAGE
Information Patent Application
Self timed bit and read/write pulse stretchers
- Publication number 20050128855
- Publication date Jun 16, 2005
- Rajiv V. Joshi
- G11 - INFORMATION STORAGE

Arthur Tuminaro

Person

Patents Grantslast 30 patents

Single clock dynamic compare circuit

Global bit select circuit interface with dual read and write bit li...

Global bit select circuit with dual read and write bit line pairs

Global bit line restore timing scheme and circuit

Global bit line restore timing scheme and circuit

Local bit select with suppression of fast read before write

Self timed bit and read/write pulse stretchers

Programmable sense amplifier timing generator

CMOS sense amplifier

Latch and data out driver for memory arrays

Patents Applicationslast 30 patents

SINGLE CLOCK DYNAMIC COMPARE CIRCUIT

Global Bit Select Circuit Interface with Dual Read and Write Bit Li...

Global Bit Line Restore Timing Scheme and Circuit

Global bit select circuit with dual read and write bit line pairs

Local bit select with suppression of fast read before write

Global bit line restore timing scheme and circuit

PROGRAMMABLE SENSE AMPLIFIER TIMING GENERATOR

Self timed bit and read/write pulse stretchers