Arun Vaidyanath

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Asymmetric-channel memory system
- Patent number 11,200,181
- Issue date Dec 14, 2021
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer component for asymmetric-channel memory system
- Patent number 10,621,120
- Issue date Apr 14, 2020
- Rambus Inc.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric-channel memory system
- Patent number 9,996,485
- Issue date Jun 12, 2018
- Rambus Inc.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expandable asymmetric-channel memory system
- Patent number 9,632,956
- Issue date Apr 25, 2017
- Rambus Inc.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for synchronizing address and control signals in...
- Patent number 9,507,738
- Issue date Nov 29, 2016
- Rambus Inc.
- Arun Vaidyanath
- G11 - INFORMATION STORAGE
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,349,422
- Issue date May 24, 2016
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory capacity expansion using a memory riser
- Patent number 9,298,228
- Issue date Mar 29, 2016
- Rambus Inc.
- Abhijit M. Abhyankar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Expandable asymmetric-channel memory system
- Patent number 9,183,166
- Issue date Nov 10, 2015
- Rambus Inc.
- Ian Shaeffer
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Supporting calibration for sub-rate operation in clocked memory sys...
- Patent number 9,036,436
- Issue date May 19, 2015
- Rambus Inc.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for synchronizing address and control signals in...
- Patent number 8,762,657
- Issue date Jun 24, 2014
- Rambus Inc.
- Arun Vaidyanath
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20220147472
- Publication date May 12, 2022
- Rambus Inc.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20200293469
- Publication date Sep 17, 2020
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFER COMPONENT FOR ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20180341603
- Publication date Nov 29, 2018
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20170249265
- Publication date Aug 31, 2017
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPANDABLE ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20160132439
- Publication date May 12, 2016
- RAMBUS INC.
- Ian SHAEFFER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20150310903
- Publication date Oct 29, 2015
- RAMBUS INC.
- Akash Bansal
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR SYNCHRONIZING ADDRESS AND CONTROL SIGNALS IN...
- Publication number 20150019786
- Publication date Jan 15, 2015
- RAMBUS INC.
- Arun Vaidyanath
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...
- Publication number 20130301368
- Publication date Nov 14, 2013
- RAMBUS INC.
- Akash Bansal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXPANDABLE ASYMMETRIC-CHANNEL MEMORY SYSTEM
- Publication number 20120191921
- Publication date Jul 26, 2012
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR SYNCHRONIZING ADDRESS AND CONTROL SIGNALS IN...
- Publication number 20120117338
- Publication date May 10, 2012
- RAMBUS INC.
- Arun Vaidyanath
- G06 - COMPUTING CALCULATING COUNTING

Arun Vaidyanath

Person

Patents Grantslast 30 patents

Asymmetric-channel memory system

Buffer component for asymmetric-channel memory system

Asymmetric-channel memory system

Expandable asymmetric-channel memory system

Method and system for synchronizing address and control signals in...

Supporting calibration for sub-rate operation in clocked memory sys...

Memory capacity expansion using a memory riser

Expandable asymmetric-channel memory system

Supporting calibration for sub-rate operation in clocked memory sys...

Method and system for synchronizing address and control signals in...

Patents Applicationslast 30 patents

ASYMMETRIC-CHANNEL MEMORY SYSTEM

ASYMMETRIC-CHANNEL MEMORY SYSTEM

BUFFER COMPONENT FOR ASYMMETRIC-CHANNEL MEMORY SYSTEM

ASYMMETRIC-CHANNEL MEMORY SYSTEM

EXPANDABLE ASYMMETRIC-CHANNEL MEMORY SYSTEM

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

METHOD AND SYSTEM FOR SYNCHRONIZING ADDRESS AND CONTROL SIGNALS IN...

Supporting Calibration For Sub-Rate Operation In Clocked Memory Sys...

EXPANDABLE ASYMMETRIC-CHANNEL MEMORY SYSTEM

METHOD AND SYSTEM FOR SYNCHRONIZING ADDRESS AND CONTROL SIGNALS IN...