Barry J. Arnold

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data clock recovery system and method employing delayed data clock...
- Patent number 8,467,489
- Issue date Jun 18, 2013
- Hewlett-Packard Development Company, L.P.
- Dacheng (Henry) Zhou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for driving data over a bus where the systems e...
- Patent number 7,464,284
- Issue date Dec 9, 2008
- Hewlett-Packard Development Company, L.P.
- Barry Joseph Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced bus turnaround time in a multiprocessor architecture
- Patent number 7,386,750
- Issue date Jun 10, 2008
- Hewlett-Packard Development Company, L.P.
- Barry Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output buffer slew rate control using clock signal
- Patent number 7,202,702
- Issue date Apr 10, 2007
- Hewlett-Packard Development Company, L.P.
- Barry J. Arnold
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Shunted current reduction
- Patent number 7,161,379
- Issue date Jan 9, 2007
- Hewlett-Packard Development Company, L.P.
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bus agent having multiple reference levels
- Patent number 7,113,000
- Issue date Sep 26, 2006
- Hewlett-Packard Development Company, L.P.
- Barry J. Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial termination voltage current shunting
- Patent number 7,088,130
- Issue date Aug 8, 2006
- Hewlett-Packard Development Company, L.P.
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Output buffer compensation control
- Patent number 7,057,415
- Issue date Jun 6, 2006
- Hewlett-Packard Development Company, L.P.
- Andrew R. Allen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for improving testability of I/O driver/receivers
- Patent number 6,986,087
- Issue date Jan 10, 2006
- Hewlett-Packard Development Company, L.P.
- Kevin Laake
- G01 - MEASURING TESTING
Information Patent Grant
Partial termination voltage current shunting
- Patent number 6,970,011
- Issue date Nov 29, 2005
- Hewlett-Packard Development Company, L.P.
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic logic circuit
- Patent number 6,377,080
- Issue date Apr 23, 2002
- Hewlett-Packard Company
- Barry J Arnold
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Driver circuit with precharge and active hold
- Patent number 5,856,752
- Issue date Jan 5, 1999
- Hewlett-Packard Company
- Barry J. Arnold
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Non-destructive sampling of internal states while operating at norm...
- Patent number 5,530,706
- Issue date Jun 25, 1996
- Hewlett-Packard Company
- Don D. Josephson
- G01 - MEASURING TESTING
Information Patent Grant
Pseudo-NMOS logic circuits with negligible static current during qu...
- Patent number 5,467,026
- Issue date Nov 14, 1995
- Hewlett-Packard Company
- Barry J. Arnold
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Data clock recovery system and method employing delayed data clock...
- Publication number 20070047684
- Publication date Mar 1, 2007
- Dacheng (Henry) Zhou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reduced bus turnaround time in a multiprocessor architecture
- Publication number 20070016706
- Publication date Jan 18, 2007
- Barry Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for driving data over a bus
- Publication number 20060218317
- Publication date Sep 28, 2006
- Barry Joseph Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partial termination voltage current shunting
- Publication number 20060028238
- Publication date Feb 9, 2006
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Shunted current reduction
- Publication number 20050231231
- Publication date Oct 20, 2005
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Output buffer compensation control
- Publication number 20050127939
- Publication date Jun 16, 2005
- Andrew R. Allen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Output buffer slew rate control using clock signal
- Publication number 20050127947
- Publication date Jun 16, 2005
- Barry J. Arnold
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Bus agent having multiple reference levels
- Publication number 20050127938
- Publication date Jun 16, 2005
- Barry J. Arnold
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partial termination voltage current shunting
- Publication number 20050116735
- Publication date Jun 2, 2005
- Barry J. Arnold
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for improving testability of I/O driver/receivers
- Publication number 20040049721
- Publication date Mar 11, 2004
- Kevin Laake
- G01 - MEASURING TESTING

Barry J. Arnold

Person

Patents Grantslast 30 patents

Data clock recovery system and method employing delayed data clock...

Systems and methods for driving data over a bus where the systems e...

Reduced bus turnaround time in a multiprocessor architecture

Output buffer slew rate control using clock signal

Shunted current reduction

Bus agent having multiple reference levels

Partial termination voltage current shunting

Output buffer compensation control

Method and apparatus for improving testability of I/O driver/receivers

Partial termination voltage current shunting

Dynamic logic circuit

Driver circuit with precharge and active hold

Non-destructive sampling of internal states while operating at norm...

Pseudo-NMOS logic circuits with negligible static current during qu...

Patents Applicationslast 30 patents

Data clock recovery system and method employing delayed data clock...

Reduced bus turnaround time in a multiprocessor architecture

Systems and methods for driving data over a bus

Partial termination voltage current shunting

Shunted current reduction

Output buffer compensation control

Output buffer slew rate control using clock signal

Bus agent having multiple reference levels

Partial termination voltage current shunting

Method and apparatus for improving testability of I/O driver/receivers