Bartlomiej Jan Pawlak

Person

Leuven, BE

People

Patents Grantslast 30 patents

Information Patent Grant
High-electron-mobility transistors with inactive gate blocks
- Patent number 12,199,177
- Issue date Jan 14, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Abhinay Sandupatla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light coupling between stacked photonics chips
- Patent number 12,001,056
- Issue date Jun 4, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej Jan Pawlak
- G02 - OPTICS
Information Patent Grant
Photonics chips and semiconductor products having angled optical fi...
- Patent number 11,774,689
- Issue date Oct 3, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej Jan Pawlak
- G02 - OPTICS
Information Patent Grant
Optical ring resonator-based microfluidic sensor
- Patent number 11,768,153
- Issue date Sep 26, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G01 - MEASURING TESTING
Information Patent Grant
Optical power modulators based on total internal reflection
- Patent number 11,474,383
- Issue date Oct 18, 2022
- GLOBALFOUNDRIES U.S. INC.
- Bartlomiej J. Pawlak
- G02 - OPTICS
Information Patent Grant
Semiconductor fin structure and method of fabricating the same
- Patent number 11,387,350
- Issue date Jul 12, 2022
- Imec VZW
- Geert Eneman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Physically unclonable function architecture including memory cells...
- Patent number 11,145,349
- Issue date Oct 12, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G11 - INFORMATION STORAGE
Information Patent Grant
Quantum-confined stark effect (QCSE) modulator and photonics struct...
- Patent number 11,069,830
- Issue date Jul 20, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Micro-LED display assembly
- Patent number 10,770,440
- Issue date Sep 8, 2020
- GLOBALFOUNDRIES Inc.
- Luke England
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming stacked SOI semiconductor devices with back bias...
- Patent number 10,658,388
- Issue date May 19, 2020
- GLOBALFOUNDRIES Inc.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a bulk field effect transistor (FET) with sub-so...
- Patent number 10,580,897
- Issue date Mar 3, 2020
- GLOBALFOUNDRIES Inc.
- Bartlomiej J. Pawlak
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Stacked elongated nanoshapes of different semiconductor materials a...
- Patent number 10,453,750
- Issue date Oct 22, 2019
- GLOBALFOUNDRIES Inc.
- Bartlomiej J. Pawlak
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Tunneling field effect transistor
- Patent number 10,340,369
- Issue date Jul 2, 2019
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked SOI semiconductor devices with back bias mechanism
- Patent number 10,340,290
- Issue date Jul 2, 2019
- GLOBALFOUNDRIES Inc.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming complementary nano-sheet/wire transistor devices...
- Patent number 10,304,833
- Issue date May 28, 2019
- GLOBALFOUNDRIES Inc.
- Puneet Harischandra Suvarna
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical FET with self-aligned source/drain regions and gate length...
- Patent number 10,236,379
- Issue date Mar 19, 2019
- GLOBALFOUNDRIES Inc.
- Steven Bentley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a bulk field effect transistor (FET) with sub-so...
- Patent number 10,134,901
- Issue date Nov 20, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Amorphization induced metal-silicon contact formation
- Patent number 10,128,114
- Issue date Nov 13, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back biasing in SOI FET technology
- Patent number 10,090,227
- Issue date Oct 2, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafers with reduced bow and warpage
- Patent number 10,056,453
- Issue date Aug 21, 2018
- GLOBALFOUNDRIES Inc.
- Ajey Poovannummoottil Jacob
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with gate inside U-shaped channel and methods...
- Patent number 10,020,395
- Issue date Jul 10, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanostructure field-effect transistors with enhanced mobility sourc...
- Patent number 9,978,836
- Issue date May 22, 2018
- GLOBALFOUNDRIES Inc.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked vertical-transport field-effect transistors
- Patent number 9,824,933
- Issue date Nov 21, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunneling field effect transistor and methods of making such a tran...
- Patent number 9,793,384
- Issue date Oct 17, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a contact structure for a vertical channel semic...
- Patent number 9,741,847
- Issue date Aug 22, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device comprising a multi-layer channel region
- Patent number 9,716,177
- Issue date Jul 25, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of making source/drain regions positioned inside U-shaped s...
- Patent number 9,711,644
- Issue date Jul 18, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal gate all around nanowire transistor bottom isolation
- Patent number 9,704,962
- Issue date Jul 11, 2017
- GLOBALFOUNDRIES Inc.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical fin field-effect semiconductor device
- Patent number 9,698,262
- Issue date Jul 4, 2017
- Imec VZW
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating FinFET device and structure thereof
- Patent number 9,653,593
- Issue date May 16, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EDGE COUPLERS WITH A FINE-ALIGNMENT MECHANISM
- Publication number 20240219636
- Publication date Jul 4, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej Jan Pawlak
- G02 - OPTICS
Information Patent Application
ION-SENSITIVE FIELD-EFFECT TRANSISTORS WITH LOCAL-FIELD BIAS
- Publication number 20240159701
- Publication date May 16, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Judson Holt
- G01 - MEASURING TESTING
Information Patent Application
ION-SENSITIVE FIELD EFFECT TRANSISTOR ABOVE MICROFLUIDIC CAVITY FOR...
- Publication number 20240125732
- Publication date Apr 18, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G01 - MEASURING TESTING
Information Patent Application
ELECTRO-ABSORPTION MODULATORS WITH STACKED WAVEGUIDE TAPERS
- Publication number 20240085624
- Publication date Mar 14, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Yusheng Bian
- G02 - OPTICS
Information Patent Application
MICROFLUIDIC CHANNELS IN A SUBSTRATE WITH A SURFACE COVERED BY A LA...
- Publication number 20240009668
- Publication date Jan 11, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Ramsey Hazbun
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MICROFLUIDIC CHANNEL STRUCTURE AND METHOD
- Publication number 20230405582
- Publication date Dec 21, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- B01 - PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
Information Patent Application
LIGHT COUPLING BETWEEN STACKED PHOTONICS CHIPS
- Publication number 20230393339
- Publication date Dec 7, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej Jan Pawlak
- G02 - OPTICS
Information Patent Application
OPTICAL RING RESONATOR-BASED MICROFLUIDIC SENSOR
- Publication number 20230288321
- Publication date Sep 14, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G01 - MEASURING TESTING
Information Patent Application
PHOTONICS CHIPS AND SEMICONDUCTOR PRODUCTS HAVING ANGLED OPTICAL FI...
- Publication number 20230127056
- Publication date Apr 27, 2023
- GLOBALFOUNDRIES U.S. Inc.
- BARTLOMIEJ JAN PAWLAK
- G02 - OPTICS
Information Patent Application
CONTACT-FREE BIOSENSOR
- Publication number 20230105338
- Publication date Apr 6, 2023
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G01 - MEASURING TESTING
Information Patent Application
OPTICAL POWER MODULATORS BASED ON TOTAL INTERNAL REFLECTION
- Publication number 20220146863
- Publication date May 12, 2022
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- G02 - OPTICS
Information Patent Application
CHARGE-TRAPPING LAYERS FOR III-V SEMICONDUCTOR DEVICES
- Publication number 20210280703
- Publication date Sep 9, 2021
- GLOBALFOUNDRIES U.S. Inc.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR FIN STRUCTURE AND METHOD OF FABRICATING THE SAME
- Publication number 20200212205
- Publication date Jul 2, 2020
- IMEC vzw
- Geert Eneman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING STACKED SOI SEMICONDUCTOR DEVICES WITH BACK BIAS...
- Publication number 20190280010
- Publication date Sep 12, 2019
- GLOBALFOUNDRIES INC.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOI SEMICONDUCTOR DEVICES WITH BACK BIAS MECHANISM
- Publication number 20190088680
- Publication date Mar 21, 2019
- GLOBALFOUNDRIES INC.
- Bartlomiej Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED ELONGATED NANOSHAPES OF DIFFERENT SEMICONDUCTOR MATERIALS A...
- Publication number 20180374753
- Publication date Dec 27, 2018
- GLOBALFOUNDRIES INC.
- BARTLOMIEJ J. PAWLAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A BULK FIELD EFFECT TRANSISTOR (FET) WITH SUB-SO...
- Publication number 20180374946
- Publication date Dec 27, 2018
- GLOBALFOUNDRIES INC.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL FET WITH SELF-ALIGNED SOURCE/DRAIN REGIONS AND GATE LENGTH...
- Publication number 20180331213
- Publication date Nov 15, 2018
- GLOBAL FOUNDRIES Inc.
- Steven Bentley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICRO-LED DISPLAY ASSEMBLY
- Publication number 20180269191
- Publication date Sep 20, 2018
- GLOBALFOUNDRIES INC.
- Luke ENGLAND
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOSTRUCTURE FIELD-EFFECT TRANSISTORS WITH ENHANCED MOBILITY SOURC...
- Publication number 20180130878
- Publication date May 10, 2018
- GLOBALFOUNDRIES INC.
- Bartlomiej J. Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEXTURING OF SILICON SURFACE WITH DIRECT-SELF ASSEMBLY PATTERNING
- Publication number 20180053662
- Publication date Feb 22, 2018
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan PAWLAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WAFERS WITH REDUCED BOW AND WARPAGE
- Publication number 20180026096
- Publication date Jan 25, 2018
- GLOBALFOUNDRIES INC.
- Ajey Poovannummoottil Jacob
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNNELING FIELD EFFECT TRANSISTOR
- Publication number 20180006143
- Publication date Jan 4, 2018
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HORIZONTAL GATE ALL AROUND NANOWIRE TRANSISTOR BOTTOM ISOLATION
- Publication number 20170179248
- Publication date Jun 22, 2017
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A CONTACT STRUCTURE FOR A VERTICAL CHANNEL SEMIC...
- Publication number 20170154994
- Publication date Jun 1, 2017
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AMOPHIZATION INDUCED METAL-SILICON CONTACT FORMATION
- Publication number 20170098544
- Publication date Apr 6, 2017
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH GATE INSIDE U-SHAPED CHANNEL AND METHODS...
- Publication number 20170077297
- Publication date Mar 16, 2017
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF MAKING SOURCE/DRAIN REGIONS POSITIONED INSIDE U-SHAPED S...
- Publication number 20170077301
- Publication date Mar 16, 2017
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STRESS RELAXED BUFFER LAYER ON TEXTURED SILICON SURFACE
- Publication number 20170018421
- Publication date Jan 19, 2017
- GLOBALFOUNDRIES INC.
- Bartlomiej Jan Pawlak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL FIN FIELD-EFFECT SEMICONDUCTOR DEVICE
- Publication number 20160276478
- Publication date Sep 22, 2016
- IMEC vzw
- Bartlomiej PAWLAK
- H01 - BASIC ELECTRIC ELEMENTS

Bartlomiej Jan Pawlak

Person

Patents Grantslast 30 patents

High-electron-mobility transistors with inactive gate blocks

Light coupling between stacked photonics chips

Photonics chips and semiconductor products having angled optical fi...

Optical ring resonator-based microfluidic sensor

Optical power modulators based on total internal reflection

Semiconductor fin structure and method of fabricating the same

Physically unclonable function architecture including memory cells...

Quantum-confined stark effect (QCSE) modulator and photonics struct...

Micro-LED display assembly

Methods of forming stacked SOI semiconductor devices with back bias...

Methods of forming a bulk field effect transistor (FET) with sub-so...

Stacked elongated nanoshapes of different semiconductor materials a...

Tunneling field effect transistor

Stacked SOI semiconductor devices with back bias mechanism

Method of forming complementary nano-sheet/wire transistor devices...

Vertical FET with self-aligned source/drain regions and gate length...

Methods of forming a bulk field effect transistor (FET) with sub-so...

Amorphization induced metal-silicon contact formation

Back biasing in SOI FET technology

Semiconductor wafers with reduced bow and warpage

Semiconductor device with gate inside U-shaped channel and methods...

Nanostructure field-effect transistors with enhanced mobility sourc...

Stacked vertical-transport field-effect transistors

Tunneling field effect transistor and methods of making such a tran...

Methods of forming a contact structure for a vertical channel semic...

Semiconductor device comprising a multi-layer channel region

Methods of making source/drain regions positioned inside U-shaped s...

Horizontal gate all around nanowire transistor bottom isolation

Vertical fin field-effect semiconductor device

Method of fabricating FinFET device and structure thereof

Patents Applicationslast 30 patents

EDGE COUPLERS WITH A FINE-ALIGNMENT MECHANISM

ION-SENSITIVE FIELD-EFFECT TRANSISTORS WITH LOCAL-FIELD BIAS

ION-SENSITIVE FIELD EFFECT TRANSISTOR ABOVE MICROFLUIDIC CAVITY FOR...

ELECTRO-ABSORPTION MODULATORS WITH STACKED WAVEGUIDE TAPERS

MICROFLUIDIC CHANNELS IN A SUBSTRATE WITH A SURFACE COVERED BY A LA...

MICROFLUIDIC CHANNEL STRUCTURE AND METHOD

LIGHT COUPLING BETWEEN STACKED PHOTONICS CHIPS

OPTICAL RING RESONATOR-BASED MICROFLUIDIC SENSOR

PHOTONICS CHIPS AND SEMICONDUCTOR PRODUCTS HAVING ANGLED OPTICAL FI...

CONTACT-FREE BIOSENSOR

OPTICAL POWER MODULATORS BASED ON TOTAL INTERNAL REFLECTION

CHARGE-TRAPPING LAYERS FOR III-V SEMICONDUCTOR DEVICES

SEMICONDUCTOR FIN STRUCTURE AND METHOD OF FABRICATING THE SAME

METHODS OF FORMING STACKED SOI SEMICONDUCTOR DEVICES WITH BACK BIAS...

STACKED SOI SEMICONDUCTOR DEVICES WITH BACK BIAS MECHANISM

STACKED ELONGATED NANOSHAPES OF DIFFERENT SEMICONDUCTOR MATERIALS A...

METHODS OF FORMING A BULK FIELD EFFECT TRANSISTOR (FET) WITH SUB-SO...

VERTICAL FET WITH SELF-ALIGNED SOURCE/DRAIN REGIONS AND GATE LENGTH...

MICRO-LED DISPLAY ASSEMBLY

NANOSTRUCTURE FIELD-EFFECT TRANSISTORS WITH ENHANCED MOBILITY SOURC...

TEXTURING OF SILICON SURFACE WITH DIRECT-SELF ASSEMBLY PATTERNING

SEMICONDUCTOR WAFERS WITH REDUCED BOW AND WARPAGE

TUNNELING FIELD EFFECT TRANSISTOR

HORIZONTAL GATE ALL AROUND NANOWIRE TRANSISTOR BOTTOM ISOLATION

METHODS OF FORMING A CONTACT STRUCTURE FOR A VERTICAL CHANNEL SEMIC...

AMOPHIZATION INDUCED METAL-SILICON CONTACT FORMATION

SEMICONDUCTOR DEVICE WITH GATE INSIDE U-SHAPED CHANNEL AND METHODS...

METHODS OF MAKING SOURCE/DRAIN REGIONS POSITIONED INSIDE U-SHAPED S...

STRESS RELAXED BUFFER LAYER ON TEXTURED SILICON SURFACE

VERTICAL FIN FIELD-EFFECT SEMICONDUCTOR DEVICE