Bei Chao Zhang

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit system employing alternating conductive layers
- Patent number 9,147,654
- Issue date Sep 29, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Haifeng Sheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Poly profile engineering to modulate spacer induced stress for devi...
- Patent number 8,519,445
- Issue date Aug 27, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing low-k dielectrics and method of...
- Patent number 8,358,007
- Issue date Jan 22, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Dong Kyun Sohn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and methods for cleaning and drying of wafers
- Patent number 8,177,993
- Issue date May 15, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Boon Meng Seah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing back end of line via techniques
- Patent number 8,115,276
- Issue date Feb 14, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Shaoqing Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable interconnects
- Patent number 8,102,054
- Issue date Jan 24, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Poly profile engineering to modulate spacer induced stress for devi...
- Patent number 7,993,997
- Issue date Aug 9, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for corrosion prevention during planarization
- Patent number 7,947,604
- Issue date May 24, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Fan Zhang
- B24 - GRINDING POLISHING
Information Patent Grant
Reliable interconnects
- Patent number 7,803,704
- Issue date Sep 28, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via electromigration improvement by changing the via bottom geometr...
- Patent number 7,781,895
- Issue date Aug 24, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via electromigration improvement by changing the via bottom geometr...
- Patent number 7,691,739
- Issue date Apr 6, 2010
- Chartered Semiconductor Manufacturing Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method to prevent charge damage from e-beam curing pr...
- Patent number 7,678,586
- Issue date Mar 16, 2010
- Chartered Semiconductor Manufacturing, Ltd.
- Huang Liu
- B05 - SPRAYING OR ATOMISING IN GENERAL APPLYING LIQUIDS OR OTHER FLUENT MATER...
Information Patent Grant
Semiconductor processing system with ultra low-K dielectric
- Patent number 7,622,403
- Issue date Nov 24, 2009
- Chartered Semiconductor Manufacturing Ltd.
- Yasri Yudhistira
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Entire encapsulation of Cu interconnects using self-aligned CuSiN film
- Patent number 7,524,755
- Issue date Apr 28, 2009
- Chartered Semiconductor Manufacturing, Ltd.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate aligned dual damascene openings
- Patent number 7,372,156
- Issue date May 13, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form alpha phase Ta and its application to IC manufacturing
- Patent number 7,294,241
- Issue date Nov 13, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Chim Seng Seet
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method of fabrication of a die oxide ring
- Patent number 7,276,440
- Issue date Oct 2, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Fan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-patterning of photo-active dielectric materials for interconne...
- Patent number 7,256,136
- Issue date Aug 14, 2007
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-patterning of photo-active dielectric materials for interconne...
- Patent number 7,012,022
- Issue date Mar 14, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with simultaneous fabrication of dual damascene...
- Patent number 6,995,087
- Issue date Feb 7, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate aligned dual damascene openings
- Patent number 6,967,156
- Issue date Nov 22, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using refractory metal silicidation phase transition temperature po...
- Patent number 6,517,235
- Issue date Feb 11, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Zhong Yun Zhu
- G01 - MEASURING TESTING
Information Patent Grant
Thermal stability improvement of CoSi2 film by stuffing in titanium
- Patent number 6,383,922
- Issue date May 7, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHODS FOR CLEANING AND DRYING OF WAFERS
- Publication number 20120255586
- Publication date Oct 11, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Boon Meng SEAH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECT INTEGRATION SCHEME
- Publication number 20120168915
- Publication date Jul 5, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Luying DU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...
- Publication number 20110266628
- Publication date Nov 3, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Vincent HO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECTS
- Publication number 20100314774
- Publication date Dec 16, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Bei Chao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING LOW-K DIELECTRICS AND METHOD OF...
- Publication number 20100314763
- Publication date Dec 16, 2010
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Dong Kyun Sohn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE INTERCONNECTS
- Publication number 20100044869
- Publication date Feb 25, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Bei Chao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING ALTERNATING CONDUCTIVE LAYERS
- Publication number 20100001370
- Publication date Jan 7, 2010
- Chartered Semiconductor Manufacturing LTD.
- Haifeng Sheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING BACK END OF LINE VIA TECHNIQUES
- Publication number 20090294904
- Publication date Dec 3, 2009
- Chartered Semiconductor Manufacturing LTD.
- Shaoqing Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA ELECTROMIGRATION IMPROVEMENT BY CHANGING THE VIA BOTTOM GEOMETR...
- Publication number 20090250818
- Publication date Oct 8, 2009
- Chartered Semiconductor Manufacturing LTD.
- Bei Chao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CORROSION PREVENTION DURING PLANARIZATION
- Publication number 20090191792
- Publication date Jul 30, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Fan ZHANG
- B24 - GRINDING POLISHING
Information Patent Application
POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...
- Publication number 20090085122
- Publication date Apr 2, 2009
- Vincent Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PROCESSING SYSTEM WITH ULTRA LOW-K DIELECTRIC
- Publication number 20080145795
- Publication date Jun 19, 2008
- Chartered Semiconductor Manufacturing LTD.
- Yasri Yudhistira
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Apparatus and methods for Cleaning and Drying of wafers
- Publication number 20080105653
- Publication date May 8, 2008
- Boon Meng Seah
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Entire encapsulation of Cu interconnects using self-aligned CuSiN film
- Publication number 20070197023
- Publication date Aug 23, 2007
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Johnny Widodo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method to prevent charge damage from e-beam curing pr...
- Publication number 20070134941
- Publication date Jun 14, 2007
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Huang Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-patterning of photo-active dielectric materials for interconne...
- Publication number 20060128156
- Publication date Jun 15, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fabricate aligned dual damacene openings
- Publication number 20060003573
- Publication date Jan 5, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabrication of a die oxide ring
- Publication number 20050127495
- Publication date Jun 16, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Fan Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-patterning of photo-active dielectric materials for interconne...
- Publication number 20050093158
- Publication date May 5, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fabricate aligned dual damascene openings
- Publication number 20050090095
- Publication date Apr 28, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to form alpha phase Ta and its application to IC manufacturing
- Publication number 20040131878
- Publication date Jul 8, 2004
- Chim Seng Seet
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Integrated circuit with simultaneous fabrication of dual damascene...
- Publication number 20040121585
- Publication date Jun 24, 2004
- Chartered Semiconductor Manufacturing LTD.
- Wuping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USING REFRACTORY METAL SILICIDATION PHASE TRANSITION TEMPERATURE PO...
- Publication number 20020191668
- Publication date Dec 19, 2002
- Zhong-Yun Zhu
- G01 - MEASURING TESTING

Bei Chao Zhang

Person

Patents Grantslast 30 patents

Integrated circuit system employing alternating conductive layers

Poly profile engineering to modulate spacer induced stress for devi...

Integrated circuit system employing low-k dielectrics and method of...

Apparatus and methods for cleaning and drying of wafers

Integrated circuit system employing back end of line via techniques

Reliable interconnects

Poly profile engineering to modulate spacer induced stress for devi...

Method for corrosion prevention during planarization

Reliable interconnects

Via electromigration improvement by changing the via bottom geometr...

Via electromigration improvement by changing the via bottom geometr...

Structure and method to prevent charge damage from e-beam curing pr...

Semiconductor processing system with ultra low-K dielectric

Entire encapsulation of Cu interconnects using self-aligned CuSiN film

Method to fabricate aligned dual damascene openings

Method to form alpha phase Ta and its application to IC manufacturing

Method of fabrication of a die oxide ring

Self-patterning of photo-active dielectric materials for interconne...

Self-patterning of photo-active dielectric materials for interconne...

Integrated circuit with simultaneous fabrication of dual damascene...

Method to fabricate aligned dual damascene openings

Using refractory metal silicidation phase transition temperature po...

Thermal stability improvement of CoSi2 film by stuffing in titanium

Patents Applicationslast 30 patents

APPARATUS AND METHODS FOR CLEANING AND DRYING OF WAFERS

RELIABLE INTERCONNECT INTEGRATION SCHEME

POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...

RELIABLE INTERCONNECTS

INTEGRATED CIRCUIT SYSTEM EMPLOYING LOW-K DIELECTRICS AND METHOD OF...

RELIABLE INTERCONNECTS

INTEGRATED CIRCUIT SYSTEM EMPLOYING ALTERNATING CONDUCTIVE LAYERS

INTEGRATED CIRCUIT SYSTEM EMPLOYING BACK END OF LINE VIA TECHNIQUES

VIA ELECTROMIGRATION IMPROVEMENT BY CHANGING THE VIA BOTTOM GEOMETR...

METHOD FOR CORROSION PREVENTION DURING PLANARIZATION

POLY PROFILE ENGINEERING TO MODULATE SPACER INDUCED STRESS FOR DEVI...

SEMICONDUCTOR PROCESSING SYSTEM WITH ULTRA LOW-K DIELECTRIC

Apparatus and methods for Cleaning and Drying of wafers

Entire encapsulation of Cu interconnects using self-aligned CuSiN film

Structure and method to prevent charge damage from e-beam curing pr...

Self-patterning of photo-active dielectric materials for interconne...

Method to fabricate aligned dual damacene openings

Method of fabrication of a die oxide ring

Self-patterning of photo-active dielectric materials for interconne...

Method to fabricate aligned dual damascene openings

Method to form alpha phase Ta and its application to IC manufacturing

Integrated circuit with simultaneous fabrication of dual damascene...

USING REFRACTORY METAL SILICIDATION PHASE TRANSITION TEMPERATURE PO...