Bernd E. Kastenmeier

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods of forming semiconductor devices having conductors with dif...
- Patent number 8,987,862
- Issue date Mar 24, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Bernd E. Kastenmeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for treating a wafer edge
- Patent number 7,256,148
- Issue date Aug 14, 2007
- International Business Machines Corporation
- Bernd E. Kastenmeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interlevel dielectric layer and metal layer sealing
- Patent number 7,214,608
- Issue date May 8, 2007
- International Business Machines Corporation
- Matthew S. Angyal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall sealing of porous dielectric materials
- Patent number 7,157,373
- Issue date Jan 2, 2007
- Infineon Technologies AG
- Andreas Knorr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Air gaps between conductive lines for reduced RC delay of integrate...
- Patent number 7,125,782
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Andreas Knorr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure and method for reducing thermo-mechanical stress in stack...
- Patent number 6,831,363
- Issue date Dec 14, 2004
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to decrease fluorine contamination in low dielectric constan...
- Patent number 6,613,484
- Issue date Sep 2, 2003
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE HAVING CONDUCTORS WITH DIFFERENT DIMENSIONS AN...
- Publication number 20120175733
- Publication date Jul 12, 2012
- BERND E. KASTENMEIER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TREATING A WAFER EDGE
- Publication number 20090004865
- Publication date Jan 1, 2009
- Bernd E. E. Kastenmeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TREATING A WAFER EDGE
- Publication number 20060258177
- Publication date Nov 16, 2006
- International Business Machines Corporation
- Bernd E. Kastenmeier
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Air gaps between conductive lines for reduced RC delay of integrate...
- Publication number 20060081830
- Publication date Apr 20, 2006
- Andreas Knorr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERLEVEL DIELECTRIC LAYER AND METAL LAYER SEALING
- Publication number 20060024961
- Publication date Feb 2, 2006
- Matthew S. Angyal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In-situ liner formation during reactive ion etch
- Publication number 20050176237
- Publication date Aug 11, 2005
- Theodorus E. Standaert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sidewall sealing of porous dielectric materials
- Publication number 20050127515
- Publication date Jun 16, 2005
- Andreas Knorr
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Structure and method for reducing thermo-mechanical stress in stack...
- Publication number 20040113278
- Publication date Jun 17, 2004
- International Business Machines Corporation
- Timothy J. Dalton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO DECREASE FLUORINE CONTAMINATION IN LOW DIELECTRIC CONSTAT...
- Publication number 20030116533
- Publication date Jun 26, 2003
- International Business Machines Corporation
- Timothy H. Dalton
- H01 - BASIC ELECTRIC ELEMENTS

Bernd E. Kastenmeier

Person

Patents Grantslast 30 patents

Methods of forming semiconductor devices having conductors with dif...

Method for treating a wafer edge

Interlevel dielectric layer and metal layer sealing

Sidewall sealing of porous dielectric materials

Air gaps between conductive lines for reduced RC delay of integrate...

Structure and method for reducing thermo-mechanical stress in stack...

Method to decrease fluorine contamination in low dielectric constan...

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE HAVING CONDUCTORS WITH DIFFERENT DIMENSIONS AN...

METHOD FOR TREATING A WAFER EDGE

METHOD FOR TREATING A WAFER EDGE

Air gaps between conductive lines for reduced RC delay of integrate...

INTERLEVEL DIELECTRIC LAYER AND METAL LAYER SEALING

In-situ liner formation during reactive ion etch

Sidewall sealing of porous dielectric materials

Structure and method for reducing thermo-mechanical stress in stack...

METHOD TO DECREASE FLUORINE CONTAMINATION IN LOW DIELECTRIC CONSTAT...