Bertrand Bertrand

Person

Trets, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Procedure and device for identifying an operating mode of a control...
- Patent number 7,237,157
- Issue date Jun 26, 2007
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for erasing/programming a non-volatile electrically erasable...
- Patent number 7,012,837
- Issue date Mar 14, 2006
- STMicroelectronics, S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Word programmable EEPROM memory comprising column selection latches...
- Patent number 6,714,450
- Issue date Mar 30, 2004
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and associated method for the erasure or programming of a m...
- Patent number 6,621,737
- Issue date Sep 16, 2003
- STMicroelectronics SA
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for page mode writing in an electrically erasable/programmab...
- Patent number 6,504,791
- Issue date Jan 7, 2003
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit comprising an output transistor with a controlle...
- Patent number 6,420,919
- Issue date Jul 16, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory incorporating column register and method of writing in said...
- Patent number 6,385,096
- Issue date May 7, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Grant
Serial access integrated circuit memory
- Patent number 6,359,822
- Issue date Mar 19, 2002
- STMicroelectronics S.A.
- Sébastien Zink
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of selecting a memory access line and an access line decoder...
- Patent number 6,324,117
- Issue date Nov 27, 2001
- STMicroelectronics S.A.
- Sébastien Zink
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory incorporating column register and method of writing in said...
- Patent number 6,307,792
- Issue date Oct 23, 2001
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Method for erasing/programming a non-volatile electrically erasable...
- Publication number 20050207230
- Publication date Sep 22, 2005
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
Procedure and device for identifying an operating mode of a control...
- Publication number 20050015533
- Publication date Jan 20, 2005
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
Two-threshold comparator insensitive to its environment
- Publication number 20040217793
- Publication date Nov 4, 2004
- STMicroelectronics S.A.
- Bertrand Bertrand
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Word programmable EEPROM memory comprising column selection latches...
- Publication number 20020163832
- Publication date Nov 7, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and associated method for the erasure or programming of a m...
- Publication number 20020126534
- Publication date Sep 12, 2002
- STMicroelectronics S.A.
- David Naura
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY INCORPORATING COLUMN REGISTER AND METHOD OF WRITING IN SAID...
- Publication number 20020031015
- Publication date Mar 14, 2002
- STMicroelectronics S.A.
- Bertrand Bertrand
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated circuit comprising an output transistor with a controlle...
- Publication number 20010017559
- Publication date Aug 30, 2001
- STMicroelectronics S.A.
- Bertrand Bertrand
- H03 - BASIC ELECTRONIC CIRCUITRY

Bertrand Bertrand

Person

Patents Grantslast 30 patents

Procedure and device for identifying an operating mode of a control...

Method for erasing/programming a non-volatile electrically erasable...

Word programmable EEPROM memory comprising column selection latches...

Circuit and associated method for the erasure or programming of a m...

Method for page mode writing in an electrically erasable/programmab...

Integrated circuit comprising an output transistor with a controlle...

Memory incorporating column register and method of writing in said...

Serial access integrated circuit memory

Method of selecting a memory access line and an access line decoder...

Memory incorporating column register and method of writing in said...

Patents Applicationslast 30 patents

Method for erasing/programming a non-volatile electrically erasable...

Procedure and device for identifying an operating mode of a control...

Two-threshold comparator insensitive to its environment

Word programmable EEPROM memory comprising column selection latches...

Circuit and associated method for the erasure or programming of a m...

MEMORY INCORPORATING COLUMN REGISTER AND METHOD OF WRITING IN SAID...

Integrated circuit comprising an output transistor with a controlle...