Bikas Maiti

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bitcell architecture with time-multiplexed ports
- Patent number 11,967,365
- Issue date Apr 23, 2024
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Grant
Contention-adapted read-write pulse generation circuitry
- Patent number 11,501,809
- Issue date Nov 15, 2022
- ARM Limited
- Sanjay Mangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read assist circuitry for memory applications
- Patent number 11,475,944
- Issue date Oct 18, 2022
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shift latch circuitry
- Patent number 11,005,461
- Issue date May 11, 2021
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Read assist circuitry for memory applications
- Patent number 10,854,280
- Issue date Dec 1, 2020
- ARM Limited
- Abhairaj Singh
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy circuitry for memory application
- Patent number 10,839,934
- Issue date Nov 17, 2020
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock generation circuitry for memory applications
- Patent number 10,008,260
- Issue date Jun 26, 2018
- ARM Limited
- Bikas Maiti
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuitry
- Patent number 9,997,217
- Issue date Jun 12, 2018
- ARM Limited
- Ankur Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of performing access operations within suc...
- Patent number 9,064,559
- Issue date Jun 23, 2015
- ARM Limited
- Bikas Maiti
- G11 - INFORMATION STORAGE
Information Patent Grant
Controlling a voltage level of an access signal to reduce access di...
- Patent number 8,611,172
- Issue date Dec 17, 2013
- ARM Limited
- Amaranth Shyanmugam
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having an array supply voltage control circuit
- Patent number 8,264,896
- Issue date Sep 11, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Bikas Maiti
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only memory and method of reading same
- Patent number 8,116,153
- Issue date Feb 14, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan Rana
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for forming a semiconductor device and a conductive structure
- Patent number 6,376,349
- Issue date Apr 23, 2002
- Motorola, Inc.
- Philip J. Tobin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device
- Patent number 6,255,204
- Issue date Jul 3, 2001
- Motorola, Inc.
- Philip J. Tobin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device
- Patent number 6,171,910
- Issue date Jan 9, 2001
- Motorola Inc.
- Christopher C. Hobbs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a metal containing layer overlying a ga...
- Patent number 6,084,279
- Issue date Jul 4, 2000
- Motorola Inc.
- Bich-Yen Nguyen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a metal containing layer overlying a ga...
- Patent number 6,049,114
- Issue date Apr 11, 2000
- Motorola, Inc.
- Bikas Maiti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS semiconductor devices and method of formation
- Patent number 6,027,961
- Issue date Feb 22, 2000
- Motorola, Inc.
- Bikas Maiti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming high dielectric constant metal oxides
- Patent number 6,020,024
- Issue date Feb 1, 2000
- Motorola, Inc.
- Bikas Maiti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a semiconductor device having a nitrided oxide d...
- Patent number 5,885,870
- Issue date Mar 23, 1999
- Motorola, Inc.
- Bikas Maiti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a high voltage gate dielectric for use in integr...
- Patent number 5,861,347
- Issue date Jan 19, 1999
- Motorola Inc.
- Bikas Maiti
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for reducing halogen concentration in a material layer duri...
- Patent number 5,830,802
- Issue date Nov 3, 1998
- Motorola Inc.
- Hsing-Huang Tseng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Read Assist Circuitry for Memory Applications
- Publication number 20210082496
- Publication date Mar 18, 2021
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
Bitcell Architecture
- Publication number 20200395064
- Publication date Dec 17, 2020
- ARM Limited
- Yew Keong Chong
- G11 - INFORMATION STORAGE
Information Patent Application
Level Shift Latch Circuitry
- Publication number 20190379364
- Publication date Dec 12, 2019
- ARM Limited
- Andy Wangkun Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Redundancy Circuitry for Memory Application
- Publication number 20190371424
- Publication date Dec 5, 2019
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
Read Assist Circuitry for Memory Applications
- Publication number 20190066772
- Publication date Feb 28, 2019
- ARM Limited
- Abhairaj Singh
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF PERFORMING ACCESS OPERATIONS WITHIN SUC...
- Publication number 20150049563
- Publication date Feb 19, 2015
- ARM Limited
- Bikas MAITI
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DI...
- Publication number 20130308407
- Publication date Nov 21, 2013
- ARM Limited
- Amaranth Shyanmugam
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH DENSITY AND LOW VARIABILITY READ ONLY MEMORY
- Publication number 20110211382
- Publication date Sep 1, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR
- Publication number 20110128807
- Publication date Jun 2, 2011
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
READ ONLY MEMORY AND METHOD OF READING SAME
- Publication number 20100208506
- Publication date Aug 19, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Manmohan RANA
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT
- Publication number 20100027360
- Publication date Feb 4, 2010
- BIKAS MAITI
- G11 - INFORMATION STORAGE
Information Patent Application
Method of forming an NMOS transistor and structure thereof
- Publication number 20050095763
- Publication date May 5, 2005
- Srikanth B. Samavedam
- H01 - BASIC ELECTRIC ELEMENTS

Bikas Maiti

Person

Patents Grantslast 30 patents

Bitcell architecture with time-multiplexed ports

Contention-adapted read-write pulse generation circuitry

Read assist circuitry for memory applications

Level shift latch circuitry

Read assist circuitry for memory applications

Redundancy circuitry for memory application

Clock generation circuitry for memory applications

Write assist circuitry

Memory device and method of performing access operations within suc...

Controlling a voltage level of an access signal to reduce access di...

Integrated circuit having an array supply voltage control circuit

Read only memory and method of reading same

Process for forming a semiconductor device and a conductive structure

Method for forming a semiconductor device

Method for forming a semiconductor device

Semiconductor device having a metal containing layer overlying a ga...

Semiconductor device having a metal containing layer overlying a ga...

CMOS semiconductor devices and method of formation

Method for forming high dielectric constant metal oxides

Method for forming a semiconductor device having a nitrided oxide d...

Method for forming a high voltage gate dielectric for use in integr...

Process for reducing halogen concentration in a material layer duri...

Patents Applicationslast 30 patents

Read Assist Circuitry for Memory Applications

Bitcell Architecture

Level Shift Latch Circuitry

Redundancy Circuitry for Memory Application

Read Assist Circuitry for Memory Applications

MEMORY DEVICE AND METHOD OF PERFORMING ACCESS OPERATIONS WITHIN SUC...

CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DI...

HIGH DENSITY AND LOW VARIABILITY READ ONLY MEMORY

MEMORY DEVICE AND SENSE CIRCUITRY THEREFOR

READ ONLY MEMORY AND METHOD OF READING SAME

INTEGRATED CIRCUIT HAVING AN ARRAY SUPPLY VOLTAGE CONTROL CIRCUIT

Method of forming an NMOS transistor and structure thereof