Billy D. Ables

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Process for fabricating a three dimensional molded feed structure
- Patent number 9,072,164
- Issue date Jun 30, 2015
- Raytheon Company
- Alberto F. Viscarra
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
System for forming patterns on a multi-curved surface
- Patent number 7,979,144
- Issue date Jul 12, 2011
- Raytheon Company
- Sankerlingam Rajendran
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and apparatus for packaging circuit devices
- Patent number 7,977,208
- Issue date Jul 12, 2011
- Raytheon Company
- Billy D. Ables
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method and apparatus for packaging circuit devices
- Patent number 7,867,874
- Issue date Jan 11, 2011
- Raytheon Company
- Billy D. Ables
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Method and apparatus for packaging circuit devices
- Patent number 7,535,093
- Issue date May 19, 2009
- Raytheon Company
- Billy D. Ables
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Wafer level interconnection
- Patent number 6,633,079
- Issue date Oct 14, 2003
- Raytheon Company
- James L. Cheever
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Water level interconnection
- Patent number 6,512,300
- Issue date Jan 28, 2003
- Raytheon Company
- James L. Cheever
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Microelectronic assemblies including Z-axis conductive films
- Patent number 5,805,426
- Issue date Sep 8, 1998
- Texas Instruments Incorporated
- Gordon D. Merritt
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PROCESS FOR FABRICATING A THREE DIMENSIONAL MOLDED FEED STRUCTURE
- Publication number 20110113619
- Publication date May 19, 2011
- Alberto F. Viscarra
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and Apparatus for Packaging Circuit Devices
- Publication number 20110097845
- Publication date Apr 28, 2011
- Raytheon Company
- Billy D. Ables
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Method and Apparatus for Building Multilayer Circuits
- Publication number 20100300734
- Publication date Dec 2, 2010
- Raytheon Company
- Billy D. Ables
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method and Apparatus for Packaging Circuit Devices
- Publication number 20090227068
- Publication date Sep 10, 2009
- Raytheon Company
- Billy D. Ables
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
System for Forming Patterns on a Multi-Curved Surface
- Publication number 20090110265
- Publication date Apr 30, 2009
- Raytheon Company
- Sankerlingam Rajendran
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method for sealing vias in a substrate
- Publication number 20080099537
- Publication date May 1, 2008
- Raytheon Company
- Premjeet Chahal
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Wafer level interconnection
- Publication number 20030047799
- Publication date Mar 13, 2003
- Raytheon Company
- James L. Cheever
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
WAFER LEVEL INTERCONNECTION
- Publication number 20030001251
- Publication date Jan 2, 2003
- James L. Cheever
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Billy D. Ables

Person

Patents Grantslast 30 patents

Process for fabricating a three dimensional molded feed structure

System for forming patterns on a multi-curved surface

Method and apparatus for packaging circuit devices

Method and apparatus for packaging circuit devices

Method and apparatus for packaging circuit devices

Wafer level interconnection

Water level interconnection

Microelectronic assemblies including Z-axis conductive films

Patents Applicationslast 30 patents

PROCESS FOR FABRICATING A THREE DIMENSIONAL MOLDED FEED STRUCTURE

Method and Apparatus for Packaging Circuit Devices

Method and Apparatus for Building Multilayer Circuits

Method and Apparatus for Packaging Circuit Devices

System for Forming Patterns on a Multi-Curved Surface

Method for sealing vias in a substrate

Wafer level interconnection

WAFER LEVEL INTERCONNECTION