Bob Bigwood

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pattern decomposition lithography techniques
- Patent number 11,107,786
- Issue date Aug 31, 2021
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal via processing schemes with via critical dimension (CD) contr...
- Patent number 10,636,700
- Issue date Apr 28, 2020
- Intel Corporation
- Paul A. Nyhus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pattern decomposition lithography techniques
- Patent number 10,490,519
- Issue date Nov 26, 2019
- Intel Corporation
- Charles H. Wallace
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pattern decomposition lithography techniques
- Patent number 10,409,152
- Issue date Sep 10, 2019
- Intel Corporation
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal via processing schemes with via critical dimension (CD) contr...
- Patent number 10,319,625
- Issue date Jun 11, 2019
- Intel Corporation
- Paul A. Nyhus
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pattern decomposition lithography techniques
- Patent number 9,558,947
- Issue date Jan 31, 2017
- Intel Corporation
- Charles H. Wallace
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Winged vias to increase overlay margin
- Patent number 8,058,177
- Issue date Nov 15, 2011
- Intel Corporation
- Martin Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process window-based correction for photolithography masks
- Patent number 7,470,492
- Issue date Dec 30, 2008
- Intel Corporation
- Robert M. Bigwood
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
DUMMY GATE PATTERNING LINES AND INTEGRATED CIRCUIT STRUCTURES RESUL...
- Publication number 20220415780
- Publication date Dec 29, 2022
- Intel Corporation
- William HSU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES
- Publication number 20210375807
- Publication date Dec 2, 2021
- Intel Corporation
- CHARLES H. WALLACE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES
- Publication number 20210183761
- Publication date Jun 17, 2021
- Intel Corporation
- Reken Patel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES
- Publication number 20200091101
- Publication date Mar 19, 2020
- Intel Corporation
- CHARLES H. WALLACE
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METAL VIA PROCESSING SCHEMES WITH VIA CRITICAL DIMENSION (CD) CONTR...
- Publication number 20190259656
- Publication date Aug 22, 2019
- Intel Corporation
- Paul A. NYHUS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL VIA PROCESSING SCHEMES WITH VIA CRITICAL DIMENSION (CD) CONTR...
- Publication number 20180323100
- Publication date Nov 8, 2018
- Paul A. NYHUS
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES
- Publication number 20170207185
- Publication date Jul 20, 2017
- Intel Corporation
- CHARLES H. WALLACE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES
- Publication number 20170139318
- Publication date May 18, 2017
- Intel Corporation
- CHARLES H. WALLACE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DATA COMPRESSION FOR EBEAM THROUGHPUT
- Publication number 20170069509
- Publication date Mar 9, 2017
- Intel Corporation
- Donald W. NELSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES
- Publication number 20140117488
- Publication date May 1, 2014
- Charles H. Wallace
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WINGED VIAS TO INCREASE OVERLAY MARGIN
- Publication number 20100025858
- Publication date Feb 4, 2010
- Martin Weiss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process window-based correction for photolithography masks
- Publication number 20060095887
- Publication date May 4, 2006
- Robert M. Bigwood
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Bob Bigwood

Person

Patents Grantslast 30 patents

Pattern decomposition lithography techniques

Metal via processing schemes with via critical dimension (CD) contr...

Pattern decomposition lithography techniques

Pattern decomposition lithography techniques

Metal via processing schemes with via critical dimension (CD) contr...

Pattern decomposition lithography techniques

Winged vias to increase overlay margin

Process window-based correction for photolithography masks

Patents Applicationslast 30 patents

DUMMY GATE PATTERNING LINES AND INTEGRATED CIRCUIT STRUCTURES RESUL...

PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES

LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES

PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES

METAL VIA PROCESSING SCHEMES WITH VIA CRITICAL DIMENSION (CD) CONTR...

METAL VIA PROCESSING SCHEMES WITH VIA CRITICAL DIMENSION (CD) CONTR...

PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES

PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES

DATA COMPRESSION FOR EBEAM THROUGHPUT

PATTERN DECOMPOSITION LITHOGRAPHY TECHNIQUES

WINGED VIAS TO INCREASE OVERLAY MARGIN

Process window-based correction for photolithography masks