Boon Suan Jeung

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Method for packaging circuits
- Patent number 10,811,278
- Issue date Oct 20, 2020
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging circuits
- Patent number 10,453,704
- Issue date Oct 22, 2019
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging circuits
- Patent number 9,484,225
- Issue date Nov 1, 2016
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor assemblies and methods for manufacturing suc...
- Patent number 8,629,054
- Issue date Jan 14, 2014
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 8,138,617
- Issue date Mar 20, 2012
- Round Rock Research, LLC
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 8,115,306
- Issue date Feb 14, 2012
- Round Rock Research, LLC
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 8,008,126
- Issue date Aug 30, 2011
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic die packages with leadframes, including leadframe-b...
- Patent number 7,947,529
- Issue date May 24, 2011
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,679,179
- Issue date Mar 16, 2010
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 7,675,169
- Issue date Mar 9, 2010
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,528,477
- Issue date May 5, 2009
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating packaged die
- Patent number 7,358,154
- Issue date Apr 15, 2008
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support elements for semiconductor devices with peripherally locate...
- Patent number 7,285,850
- Issue date Oct 23, 2007
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,276,387
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices and semiconductor device components with peri...
- Patent number 7,226,809
- Issue date Jun 5, 2007
- Micron Technology, Inc.
- Chia Yong Poo
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor devices including peripherally located bond pads, int...
- Patent number 7,115,984
- Issue date Oct 3, 2006
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 6,949,407
- Issue date Sep 27, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 6,894,386
- Issue date May 17, 2005
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 6,855,572
- Issue date Feb 15, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-substrate microelectronic packages and methods for manufacture
- Patent number 6,841,418
- Issue date Jan 11, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices and semiconductor device components with peri...
- Patent number 6,818,977
- Issue date Nov 16, 2004
- Micron Technology, Inc.
- Chia Yong Poo
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Apparatus and method for leadless packaging of semiconductor devices
- Patent number 6,790,706
- Issue date Sep 14, 2004
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for leadless packaging of semiconductor devices
- Patent number 6,787,894
- Issue date Sep 7, 2004
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-substrate microelectronic packages and methods for manufacture
- Patent number 6,750,547
- Issue date Jun 15, 2004
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for leadless packaging of semiconductor devices
- Patent number 6,747,348
- Issue date Jun 8, 2004
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for leadless packaging of semiconductor devices
- Patent number 6,743,696
- Issue date Jun 1, 2004
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices including peripherally located bond pads, ass...
- Patent number 6,727,116
- Issue date Apr 27, 2004
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level stackable semiconductor package
- Patent number 6,611,052
- Issue date Aug 26, 2003
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stackable semiconductor package and wafer level fabrication method
- Patent number 6,582,992
- Issue date Jun 24, 2003
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20190362988
- Publication date Nov 28, 2019
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20170047231
- Publication date Feb 16, 2017
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20140045280
- Publication date Feb 13, 2014
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20120241957
- Publication date Sep 27, 2012
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...
- Publication number 20120241982
- Publication date Sep 27, 2012
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...
- Publication number 20120211896
- Publication date Aug 23, 2012
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...
- Publication number 20110215453
- Publication date Sep 8, 2011
- Micron Technology, Inc.
- Meow Koon Eng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
- Publication number 20110175206
- Publication date Jul 21, 2011
- Micron Technology, Inc.
- Chua Swee Kwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...
- Publication number 20110084402
- Publication date Apr 14, 2011
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20110068454
- Publication date Mar 24, 2011
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
- Publication number 20100140794
- Publication date Jun 10, 2010
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
- Publication number 20100133662
- Publication date Jun 3, 2010
- Micron Technology, Inc.
- Chua Swee Kwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20100068851
- Publication date Mar 18, 2010
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
- Publication number 20090057843
- Publication date Mar 5, 2009
- Micron Technology, Inc.
- Chua Swee Kwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...
- Publication number 20090045489
- Publication date Feb 19, 2009
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20090026600
- Publication date Jan 29, 2009
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...
- Publication number 20090014859
- Publication date Jan 15, 2009
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20080067675
- Publication date Mar 20, 2008
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
- Publication number 20080054423
- Publication date Mar 6, 2008
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor devices including peripherally located bond pads, int...
- Publication number 20060208351
- Publication date Sep 21, 2006
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Support elements for semiconductor devices with peripherally locate...
- Publication number 20060208350
- Publication date Sep 21, 2006
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for packaging circuits
- Publication number 20060084240
- Publication date Apr 20, 2006
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060014319
- Publication date Jan 19, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060008946
- Publication date Jan 12, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060006519
- Publication date Jan 12, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060001142
- Publication date Jan 5, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20050130345
- Publication date Jun 16, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for packaging circuits
- Publication number 20050029668
- Publication date Feb 10, 2005
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-substrate microelectronic packages and methods for manufacture
- Publication number 20040183207
- Publication date Sep 23, 2004
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor devices including peripherally located bond pads, int...
- Publication number 20040124523
- Publication date Jul 1, 2004
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS

Boon Suan Jeung

Person

Patents Grantslast 30 patents

Method for packaging circuits

Method for packaging circuits

Method for packaging circuits

Packaged semiconductor assemblies and methods for manufacturing suc...

Apparatus and method for packaging circuits

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Microelectronic die packages with leadframes, including leadframe-b...

Castellation wafer level packaging of integrated circuit chips

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Method for fabricating packaged die

Support elements for semiconductor devices with peripherally locate...

Castellation wafer level packaging of integrated circuit chips

Semiconductor devices and semiconductor device components with peri...

Semiconductor devices including peripherally located bond pads, int...

Castellation wafer level packaging of integrated circuit chips

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Multi-substrate microelectronic packages and methods for manufacture

Semiconductor devices and semiconductor device components with peri...

Apparatus and method for leadless packaging of semiconductor devices

Apparatus and method for leadless packaging of semiconductor devices

Multi-substrate microelectronic packages and methods for manufacture

Apparatus and method for leadless packaging of semiconductor devices

Apparatus and method for leadless packaging of semiconductor devices

Semiconductor devices including peripherally located bond pads, ass...

Wafer level stackable semiconductor package

Stackable semiconductor package and wafer level fabrication method

Patents Applicationslast 30 patents

METHOD FOR PACKAGING CIRCUITS

METHOD FOR PACKAGING CIRCUITS

METHOD FOR PACKAGING CIRCUITS

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...

INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...

MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...

SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES

PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

APPARATUS AND METHOD FOR PACKAGING CIRCUITS

SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES

MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

APPARATUS AND METHOD FOR PACKAGING CIRCUITS

Semiconductor devices including peripherally located bond pads, int...

Support elements for semiconductor devices with peripherally locate...

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

Apparatus and method for packaging circuits

Multi-substrate microelectronic packages and methods for manufacture

Semiconductor devices including peripherally located bond pads, int...