Boris A. Babaian

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Single-chip multiprocessor with clock cycle-precise program schedul...
- Patent number 8,261,250
- Issue date Sep 4, 2012
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-chip multiprocessor with clock cycle-precise program schedul...
- Patent number 7,895,587
- Issue date Feb 22, 2011
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-chip multiprocessor with cycle-precise program scheduling of...
- Patent number 7,143,401
- Issue date Nov 28, 2006
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of using a plurality of virtual memory spaces for providing...
- Patent number 7,069,412
- Issue date Jun 27, 2006
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for preserving precise exceptions in binary tr...
- Patent number 7,065,750
- Issue date Jun 20, 2006
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for prioritizing operations within a pipelined microprocesso...
- Patent number 7,003,650
- Issue date Feb 21, 2006
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for fast execution of translated binary code utilizing datab...
- Patent number 6,820,255
- Issue date Nov 16, 2004
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for emulating hardware features of a foreign architecture in...
- Patent number 6,732,220
- Issue date May 4, 2004
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Critical path optimization—unload hard extended scalar block
- Patent number 6,584,611
- Issue date Jun 24, 2003
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Critical path optimization-unzipping
- Patent number 6,564,372
- Issue date May 13, 2003
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch preparation
- Patent number 6,560,775
- Issue date May 6, 2003
- Elbrus International Limited
- Alexander M. Artymov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrity of tagged data
- Patent number 6,549,903
- Issue date Apr 15, 2003
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Critical path optimization-optimizing branch operation insertion
- Patent number 6,526,573
- Issue date Feb 25, 2003
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for removing dependent store-load pair from critical path
- Patent number 6,516,463
- Issue date Feb 4, 2003
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for asynchronous array loading
- Patent number 6,243,822
- Issue date Jun 5, 2001
- Elbrus International Limited
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architectural support for software pipelining of nested loops
- Patent number 5,958,048
- Issue date Sep 28, 1999
- Elbrus International Ltd.
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array prefetch apparatus and method
- Patent number 5,889,985
- Issue date Mar 30, 1999
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architectural support for execution control of prologue and eplogue...
- Patent number 5,794,029
- Issue date Aug 11, 1998
- Elbrus International Ltd.
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wide instruction word architecture central processor
- Patent number 5,418,975
- Issue date May 23, 1995
- Institut Tochnoi Mekhaniki I Vychislitelnoi Tekhniki Imeni S.A. Lebedeva Akad...
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SINGLE-CHIP MULTIPROCESSOR WITH CLOCK CYCLE-PRECISE PROGRAM SCHEDUL...
- Publication number 20110107067
- Publication date May 5, 2011
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single-chip multiprocessor with clock cycle-precise program schedul...
- Publication number 20070006193
- Publication date Jan 4, 2007
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of using a plurality of virtual memory spaces for providing...
- Publication number 20040024953
- Publication date Feb 5, 2004
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for prioritizing operations within a pipelined microprocesso...
- Publication number 20020169944
- Publication date Nov 14, 2002
- Elbrus International
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for preserving precise exceptions in binary tr...
- Publication number 20020092002
- Publication date Jul 11, 2002
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for removing dependent store-load pair from critical path
- Publication number 20020066090
- Publication date May 30, 2002
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for fast execution of translated binary code utilizing datab...
- Publication number 20020059268
- Publication date May 16, 2002
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for effective binary translation between different instructi...
- Publication number 20020046305
- Publication date Apr 18, 2002
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for emulating hardware features of a foreign architecture in...
- Publication number 20020029308
- Publication date Mar 7, 2002
- Boris Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Critical path optimization - unload hard extended scalar block
- Publication number 20010052120
- Publication date Dec 13, 2001
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single-chip multiprocessor with cycle-precise program scheduling of...
- Publication number 20010042189
- Publication date Nov 15, 2001
- Boris A. Babaian
- G06 - COMPUTING CALCULATING COUNTING

Boris A. Babaian

Person

Patents Grantslast 30 patents

Single-chip multiprocessor with clock cycle-precise program schedul...

Single-chip multiprocessor with clock cycle-precise program schedul...

Single-chip multiprocessor with cycle-precise program scheduling of...

Method of using a plurality of virtual memory spaces for providing...

Method and apparatus for preserving precise exceptions in binary tr...

Method for prioritizing operations within a pipelined microprocesso...

Method for fast execution of translated binary code utilizing datab...

Method for emulating hardware features of a foreign architecture in...

Critical path optimization&#x02014;unload hard extended scalar block

Critical path optimization-unzipping

Branch preparation

Integrity of tagged data

Critical path optimization-optimizing branch operation insertion

Method for removing dependent store-load pair from critical path

Method and system for asynchronous array loading

Architectural support for software pipelining of nested loops

Array prefetch apparatus and method

Architectural support for execution control of prologue and eplogue...

Wide instruction word architecture central processor

Patents Applicationslast 30 patents

SINGLE-CHIP MULTIPROCESSOR WITH CLOCK CYCLE-PRECISE PROGRAM SCHEDUL...

Single-chip multiprocessor with clock cycle-precise program schedul...

Method of using a plurality of virtual memory spaces for providing...

Method for prioritizing operations within a pipelined microprocesso...

Method and apparatus for preserving precise exceptions in binary tr...

Method for removing dependent store-load pair from critical path

Method for fast execution of translated binary code utilizing datab...

Method for effective binary translation between different instructi...

Method for emulating hardware features of a foreign architecture in...

Critical path optimization - unload hard extended scalar block

Single-chip multiprocessor with cycle-precise program scheduling of...

Critical path optimization—unload hard extended scalar block