Brian Johnson

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data storage system, electronic system, and telecommunications system
- Patent number 8,782,333
- Issue date Jul 15, 2014
- Micron Technology, Inc.
- Brian Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data storage system, electronic system, and telecommunications system
- Patent number 8,225,033
- Issue date Jul 17, 2012
- Micron Technology, Inc.
- Brian Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device and method having low-power, high write latency mode...
- Patent number 8,164,965
- Issue date Apr 24, 2012
- Round Rock Research, LLC
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for address FIFO for high bandwidth command/ad...
- Patent number 7,913,035
- Issue date Mar 22, 2011
- Micron Technology, Inc.
- Brian Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device and method having low-power, high write latency mode...
- Patent number 7,826,283
- Issue date Nov 2, 2010
- Round Rock Research, LLC
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for generating reference voltages for signal rece...
- Patent number 7,746,959
- Issue date Jun 29, 2010
- Micron Technology, Inc.
- Brent Keeth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for address FIFO for high-bandwidth command/ad...
- Patent number 7,698,499
- Issue date Apr 13, 2010
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating reference voltages for signal rece...
- Patent number 7,577,212
- Issue date Aug 18, 2009
- Micron Technology, Inc.
- Brent Keeth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device and method having data path with multiple prefetch I/...
- Patent number 7,457,172
- Issue date Nov 25, 2008
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method having low-power, high write latency mode...
- Patent number 7,450,447
- Issue date Nov 11, 2008
- Micron Technology, Inc.
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating driver impedance
- Patent number 7,436,202
- Issue date Oct 14, 2008
- Micron Technology, Inc.
- Feng Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory device and method having data path with multiple prefetch I/...
- Patent number 7,310,276
- Issue date Dec 18, 2007
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiphase clock generation
- Patent number 7,276,949
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and method for strobing data, command and address sig...
- Patent number 7,269,094
- Issue date Sep 11, 2007
- Micron Technology, Inc.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method having low-power, high write latency mode...
- Patent number 7,254,067
- Issue date Aug 7, 2007
- Micron Technology, Inc.
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method for strobing data, command and address sig...
- Patent number 7,251,194
- Issue date Jul 31, 2007
- Micron Technology, Inc.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method for strobing data, command and address sig...
- Patent number 7,245,553
- Issue date Jul 17, 2007
- Micron Technology, Inc.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for mounting microelectronic devices on a mirr...
- Patent number 7,200,022
- Issue date Apr 3, 2007
- Micron Technology, Inc.
- Chris G. Martin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method for strobing data, command and address sig...
- Patent number 7,187,617
- Issue date Mar 6, 2007
- Micron Technology, Inc.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for mounting microelectronic devices on a mirr...
- Patent number 7,161,821
- Issue date Jan 9, 2007
- Micron Technology, Inc.
- Chris G. Martin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and structures for reduced parasitic capacitance in integrat...
- Patent number 7,160,795
- Issue date Jan 9, 2007
- Micron Technology, Inc.
- Shubneesh Batra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for adjusting the timing offset between a clock s...
- Patent number 7,159,092
- Issue date Jan 2, 2007
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method having data path with multiple prefetch I/...
- Patent number 7,151,707
- Issue date Dec 19, 2006
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method having low-power, high write latency mode...
- Patent number 7,149,141
- Issue date Dec 12, 2006
- Micron Technology, Inc.
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for calibrating driver impedance
- Patent number 7,129,738
- Issue date Oct 31, 2006
- Micron Technology, Inc.
- Feng Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system and method for strobing data, command and address sig...
- Patent number 7,126,874
- Issue date Oct 24, 2006
- Micron Technology, Inc.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for address FIFO for high-bandwidth command/ad...
- Patent number 7,085,880
- Issue date Aug 1, 2006
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode synchronous memory device and methods of operating and t...
- Patent number 7,057,967
- Issue date Jun 6, 2006
- Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for clock domain crossing with integrated decode
- Patent number 7,058,799
- Issue date Jun 6, 2006
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method having data path with multiple prefetch I/...
- Patent number 7,038,966
- Issue date May 2, 2006
- Micron Technology, Inc.
- Brent Keeth
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DATA STORAGE SYSTEM, ELECTRONIC SYSTEM, AND TELECOMMUNICATIONS SYSTEM
- Publication number 20120281485
- Publication date Nov 8, 2012
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA STORAGE SYSTEM, ELECTRONIC SYSTEM, AND TELECOMMUNICATIONS SYSTEM
- Publication number 20110161577
- Publication date Jun 30, 2011
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD HAVING LOW-POWER, HIGH WRITE LATENCY MODE...
- Publication number 20110038217
- Publication date Feb 17, 2011
- ROUND ROCK RESEARCH, LLC
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR ADDRESS FIFO FOR HIGH BANDWIDTH COMMAND/AD...
- Publication number 20100199034
- Publication date Aug 5, 2010
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD HAVING LOW-POWER, HIGH WRITE LATENCY MODE...
- Publication number 20090067267
- Publication date Mar 12, 2009
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having data path with multiple prefetch I/...
- Publication number 20080089158
- Publication date Apr 17, 2008
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having low-power, high write latency mode...
- Publication number 20070268756
- Publication date Nov 22, 2007
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Apparatus and method for mounting microelectronic devices on a mirr...
- Publication number 20070115712
- Publication date May 24, 2007
- Chris G. Martin
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Memory device and method having data path with multiple prefetch I/...
- Publication number 20070058469
- Publication date Mar 15, 2007
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for calibrating driver impedance
- Publication number 20070018682
- Publication date Jan 25, 2007
- Micron Technology, Inc.
- Feng Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for address FIFO for high-bandwidth command/ad...
- Publication number 20060265547
- Publication date Nov 23, 2006
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for generating reference voltages for signal rece...
- Publication number 20060203938
- Publication date Sep 14, 2006
- Brent Keeth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory device and method having low-power, high write latency mode...
- Publication number 20060152983
- Publication date Jul 13, 2006
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Multiphase clock generation
- Publication number 20060156084
- Publication date Jul 13, 2006
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory system and method for strobing data, command and address sig...
- Publication number 20060140023
- Publication date Jun 29, 2006
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method for strobing data, command and address sig...
- Publication number 20060143491
- Publication date Jun 29, 2006
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method for strobing data, command and address sig...
- Publication number 20060133165
- Publication date Jun 22, 2006
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method for strobing data, command and address sig...
- Publication number 20060126406
- Publication date Jun 15, 2006
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having data path with multiple prefetch I/...
- Publication number 20060082478
- Publication date Apr 20, 2006
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system and method for strobing data, command and address sig...
- Publication number 20060044891
- Publication date Mar 2, 2006
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Method and system for generating reference voltages for signal rece...
- Publication number 20060045206
- Publication date Mar 2, 2006
- Brent Keeth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Multiphase clock generators
- Publication number 20050212580
- Publication date Sep 29, 2005
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timing calibration pattern for SLDRAM
- Publication number 20050185498
- Publication date Aug 25, 2005
- Brent Keeth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory device and method having low-power, high write latency mode...
- Publication number 20050122797
- Publication date Jun 9, 2005
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having data path with multiple prefetch I/...
- Publication number 20050122789
- Publication date Jun 9, 2005
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having data path with multiple prefetch I/...
- Publication number 20050122814
- Publication date Jun 9, 2005
- Brent Keeth
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device and method having low-power, high write latency mode...
- Publication number 20050117414
- Publication date Jun 2, 2005
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-mode synchronous memory device and methods of operating and t...
- Publication number 20050094432
- Publication date May 5, 2005
- Brian Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
Multiphase clock generators
- Publication number 20050052210
- Publication date Mar 10, 2005
- Micron Technology, Inc.
- Brian Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for mounting microelectronic devices on a mirr...
- Publication number 20050007806
- Publication date Jan 13, 2005
- Chris G. Martin
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Brian Johnson

Person

Patents Grantslast 30 patents

Data storage system, electronic system, and telecommunications system

Data storage system, electronic system, and telecommunications system

Memory device and method having low-power, high write latency mode...

Method and apparatus for address FIFO for high bandwidth command/ad...

Memory device and method having low-power, high write latency mode...

Method and system for generating reference voltages for signal rece...

Method and apparatus for address FIFO for high-bandwidth command/ad...

Method and system for generating reference voltages for signal rece...

Memory device and method having data path with multiple prefetch I/...

Memory device and method having low-power, high write latency mode...

Method and apparatus for calibrating driver impedance

Memory device and method having data path with multiple prefetch I/...

Multiphase clock generation

Memory system and method for strobing data, command and address sig...

Memory device and method having low-power, high write latency mode...

Memory system and method for strobing data, command and address sig...

Memory system and method for strobing data, command and address sig...

Apparatus and method for mounting microelectronic devices on a mirr...

Memory system and method for strobing data, command and address sig...

Apparatus and method for mounting microelectronic devices on a mirr...

Method and structures for reduced parasitic capacitance in integrat...

Method and system for adjusting the timing offset between a clock s...

Memory device and method having data path with multiple prefetch I/...

Memory device and method having low-power, high write latency mode...

Method and apparatus for calibrating driver impedance

Memory system and method for strobing data, command and address sig...

Method and apparatus for address FIFO for high-bandwidth command/ad...

Multi-mode synchronous memory device and methods of operating and t...

Apparatus and method for clock domain crossing with integrated decode

Memory device and method having data path with multiple prefetch I/...

Patents Applicationslast 30 patents

DATA STORAGE SYSTEM, ELECTRONIC SYSTEM, AND TELECOMMUNICATIONS SYSTEM

DATA STORAGE SYSTEM, ELECTRONIC SYSTEM, AND TELECOMMUNICATIONS SYSTEM

MEMORY DEVICE AND METHOD HAVING LOW-POWER, HIGH WRITE LATENCY MODE...

METHOD AND APPARATUS FOR ADDRESS FIFO FOR HIGH BANDWIDTH COMMAND/AD...

MEMORY DEVICE AND METHOD HAVING LOW-POWER, HIGH WRITE LATENCY MODE...

Memory device and method having data path with multiple prefetch I/...

Memory device and method having low-power, high write latency mode...

Apparatus and method for mounting microelectronic devices on a mirr...

Memory device and method having data path with multiple prefetch I/...

Method and apparatus for calibrating driver impedance

Method and apparatus for address FIFO for high-bandwidth command/ad...

Method and system for generating reference voltages for signal rece...

Memory device and method having low-power, high write latency mode...

Multiphase clock generation

Memory system and method for strobing data, command and address sig...

Memory system and method for strobing data, command and address sig...

Memory system and method for strobing data, command and address sig...

Memory system and method for strobing data, command and address sig...

Memory device and method having data path with multiple prefetch I/...

Memory system and method for strobing data, command and address sig...

Method and system for generating reference voltages for signal rece...

Multiphase clock generators

Timing calibration pattern for SLDRAM

Memory device and method having low-power, high write latency mode...

Memory device and method having data path with multiple prefetch I/...

Memory device and method having data path with multiple prefetch I/...

Memory device and method having low-power, high write latency mode...

Multi-mode synchronous memory device and methods of operating and t...

Multiphase clock generators

Apparatus and method for mounting microelectronic devices on a mirr...