Brian Michael Stempel

Person

Raleigh, NC, US

People

Patents Grantslast 30 patents

Information Patent Grant
Combining load or store instructions
- Patent number 11,593,117
- Issue date Feb 28, 2023
- QUALCOMM Incorporated
- Harsh Thakker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for memory bandwidth aware data prefe...
- Patent number 11,550,723
- Issue date Jan 10, 2023
- QUALCOMM Incorporated
- Niket Choudhary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for reducing pipeline stalls due to a...
- Patent number 11,061,822
- Issue date Jul 13, 2021
- QUALCOMM Incorporated
- Pritha Ghoshal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand-based reach explicit dataflow processors, and related metho...
- Patent number 10,956,162
- Issue date Mar 23, 2021
- Microsoft Technology Licensing, LLC
- Robert Douglas Clancy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for prefetching exclusive cache coher...
- Patent number 10,877,895
- Issue date Dec 29, 2020
- QUALCOMM Incorporated
- Luke Yen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precise invalidation of virtually tagged caches
- Patent number 10,318,436
- Issue date Jun 11, 2019
- QUALCOMM Incorporated
- William McAvoy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dependency-prediction of instructions
- Patent number 10,108,419
- Issue date Oct 23, 2018
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issuing instructions to execution pipelines based on register-assoc...
- Patent number 9,858,077
- Issue date Jan 2, 2018
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing performance for context-dependent instructions
- Patent number 9,823,929
- Issue date Nov 21, 2017
- QUALCOMM Incorporated
- Daren Eugene Streett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusing immediate value, write-based instructions in instruction pro...
- Patent number 9,477,476
- Issue date Oct 25, 2016
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi level indirect predictor using confidence counter and program...
- Patent number 9,477,478
- Issue date Oct 25, 2016
- QUALCOMM Incorporated
- Kulin N. Kothari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for tracking extra data permissions in an inst...
- Patent number 9,460,018
- Issue date Oct 4, 2016
- QUALCOMM Incorporated
- Leslie Mark DeBruyne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to improve speed of executing return branch instructions in...
- Patent number 9,411,590
- Issue date Aug 9, 2016
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory error detection circuits for detecting bit flips in va...
- Patent number 9,329,930
- Issue date May 3, 2016
- QUALCOMM Incorporated
- John Sumner Ingalls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Establishing a branch target instruction cache (BTIC) entry for sub...
- Patent number 9,317,293
- Issue date Apr 19, 2016
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusing conditional write instructions having opposite conditions in...
- Patent number 9,195,466
- Issue date Nov 24, 2015
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Eliminating redundant masking operations instruction processing cir...
- Patent number 9,146,741
- Issue date Sep 29, 2015
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating return address predictions for...
- Patent number 8,943,300
- Issue date Jan 27, 2015
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predecode repair cache for instructions that cross an instruction c...
- Patent number 8,898,437
- Issue date Nov 25, 2014
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for managing page crossing instructions with...
- Patent number 8,819,342
- Issue date Aug 26, 2014
- QUALCOMM Incorporated
- Leslie Mark DeBruyne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link stack repair of erroneous speculative update
- Patent number 8,438,372
- Issue date May 7, 2013
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link stack repair of erroneous speculative update
- Patent number 8,438,371
- Issue date May 7, 2013
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug circuit comparing processor instruction set operating mode
- Patent number 8,352,713
- Issue date Jan 8, 2013
- QUALCOMM Incorporated
- Kevin Charles Burke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for speculative interrupt vector prefetching
- Patent number 8,291,202
- Issue date Oct 16, 2012
- Qualcomm Incorporated
- Daren Eugene Streett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective powering of a BHT in a processor having variable length i...
- Patent number 8,185,725
- Issue date May 22, 2012
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preloading instructions from an instruction set other than a curren...
- Patent number 8,145,883
- Issue date Mar 27, 2012
- Qualcomm Incorporation
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and system for resolving simultaneous predicted branch inst...
- Patent number 8,082,428
- Issue date Dec 20, 2011
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for using a working global history register
- Patent number 7,984,279
- Issue date Jul 19, 2011
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Link stack repair of erroneous speculative update
- Patent number 7,971,044
- Issue date Jun 28, 2011
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pre-decoding variable length instructions
- Patent number 7,962,725
- Issue date Jun 14, 2011
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OPERAND-BASED REACH EXPLICIT DATAFLOW PROCESSORS, AND RELATED METHO...
- Publication number 20200409712
- Publication date Dec 31, 2020
- Microsoft Technology Licensing, LLC
- Robert Douglas CLANCY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR MEMORY BANDWIDTH AWARE DATA PREFE...
- Publication number 20200065247
- Publication date Feb 27, 2020
- QUALCOMM Incorporated
- Niket CHOUDHARY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR REDUCING PIPELINE STALLS DUE TO A...
- Publication number 20200065260
- Publication date Feb 27, 2020
- QUALCOMM Incorporated
- Pritha GHOSHAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR PREFETCHING EXCLUSIVE CACHE COHER...
- Publication number 20200065006
- Publication date Feb 27, 2020
- QUALCOMM Incorporated
- Luke YEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINING LOAD OR STORE INSTRUCTIONS
- Publication number 20200004550
- Publication date Jan 2, 2020
- QUALCOMM Incorporated
- Harsh THAKKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRECISE INVALIDATION OF VIRTUALLY TAGGED CACHES
- Publication number 20190034349
- Publication date Jan 31, 2019
- QUALCOMM Incorporated
- William MCAVOY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGREGATING CACHE MAINTENANCE INSTRUCTIONS IN PROCESSOR-BASED DEVICES
- Publication number 20180285269
- Publication date Oct 4, 2018
- QUALCOMM Incorporated
- William James McAvoy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRECISE INVALIDATION OF VIRTUALLY TAGGED CACHES
- Publication number 20180089094
- Publication date Mar 29, 2018
- QUALCOMM Incorporated
- Robert Douglas CLANCY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEPENDENCY-PREDICTION OF INSTRUCTIONS
- Publication number 20160092221
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Brian Michael STEMPEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY ERROR DETECTION CIRCUITS FOR DETECTING BIT FLIPS IN VA...
- Publication number 20150301884
- Publication date Oct 22, 2015
- QUALCOMM Incorporated
- John Sumner Ingalls
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELIMINATING REDUNDANT SYNCHRONIZATION BARRIERS IN INSTRUCTION PROCE...
- Publication number 20140281429
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING PERFORMANCE FOR CONTEXT-DEPENDENT INSTRUCTIONS
- Publication number 20140281405
- Publication date Sep 18, 2014
- Daren Eugene Streett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR FORWARDING LITERAL GENERATED DATA TO DEPEN...
- Publication number 20140281391
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO IMPROVE SPEED OF EXECUTING RETURN BRANCH INSTRUCTIONS IN...
- Publication number 20140281394
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Rodney Wayne Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fusing Immediate Value, Write-Based Instructions in Instruction Pro...
- Publication number 20140149722
- Publication date May 29, 2014
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ESTABLISHING A BRANCH TARGET INSTRUCTION CACHE (BTIC) ENTRY FOR SUB...
- Publication number 20140149726
- Publication date May 29, 2014
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR MANAGING PAGE CROSSING INSTRUCTIONS WITH...
- Publication number 20140089598
- Publication date Mar 27, 2014
- QUALCOMM Incorporated
- Leslie Mark DeBruyne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSING FLAG-PRODUCING AND FLAG-CONSUMING INSTRUCTIONS IN INSTRUCTIO...
- Publication number 20140047221
- Publication date Feb 13, 2014
- QUALCOMM Incorporated
- Andrew S. Irwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Qualifying Software Branch-Target Hints with Hardware-Based Predict...
- Publication number 20140006752
- Publication date Jan 2, 2014
- QUALCOMM Incorporated
- Michael William Morrow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREVENTING EXECUTION OF PARITY-ERROR-INDUCED UNPREDICTABLE INSTRUCT...
- Publication number 20130326195
- Publication date Dec 5, 2013
- QUALCOMM Incorporated
- Michael Scott McIlvaine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUING INSTRUCTIONS TO EXECUTION PIPELINES BASED ON REGISTER-ASSOC...
- Publication number 20130326197
- Publication date Dec 5, 2013
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSING CONDITIONAL WRITE INSTRUCTIONS HAVING OPPOSITE CONDITIONS IN...
- Publication number 20130311754
- Publication date Nov 21, 2013
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi Level Indirect Predictor using Confidence Counter and Program...
- Publication number 20130311760
- Publication date Nov 21, 2013
- QUALCOMM Incorporated
- Kulin N. Kothari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Tracking Extra Data Permissions in an Inst...
- Publication number 20130304993
- Publication date Nov 14, 2013
- QUALCOMM Incorporated
- Leslie Mark DeBruyne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Eliminating Redundant Masking Operations Instruction Processing Cir...
- Publication number 20130290683
- Publication date Oct 31, 2013
- QUALCOMM Incorporated
- Melinda J. Brown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Link Stack Repair of Erroneous Speculative Update
- Publication number 20110320790
- Publication date Dec 29, 2011
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Link Stack Repair of Erroneous Speculative Update
- Publication number 20110219220
- Publication date Sep 8, 2011
- QUALCOMM Incorporated
- James Norris Dieffenderfer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatus to Predict Non-Execution of Conditional Non-b...
- Publication number 20110047357
- Publication date Feb 24, 2011
- QUALCOMM Incorporated
- Brian M. Stempel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preloading Instructions from an Instruction Set Other than a Curren...
- Publication number 20100169615
- Publication date Jul 1, 2010
- QUALCOMM Incorporated
- Thomas Andrew Sartorius
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Effective Use of a BHT in Processor Having Variable Length Instruct...
- Publication number 20100058032
- Publication date Mar 4, 2010
- QUALCOMM Incorporated
- Brian Michael Stempel
- G06 - COMPUTING CALCULATING COUNTING

Brian Michael Stempel

Person

Patents Grantslast 30 patents

Combining load or store instructions

Method, apparatus, and system for memory bandwidth aware data prefe...

Method, apparatus, and system for reducing pipeline stalls due to a...

Operand-based reach explicit dataflow processors, and related metho...

Method, apparatus, and system for prefetching exclusive cache coher...

Precise invalidation of virtually tagged caches

Dependency-prediction of instructions

Issuing instructions to execution pipelines based on register-assoc...

Optimizing performance for context-dependent instructions

Fusing immediate value, write-based instructions in instruction pro...

Multi level indirect predictor using confidence counter and program...

Method and apparatus for tracking extra data permissions in an inst...

Method to improve speed of executing return branch instructions in...

Cache memory error detection circuits for detecting bit flips in va...

Establishing a branch target instruction cache (BTIC) entry for sub...

Fusing conditional write instructions having opposite conditions in...

Eliminating redundant masking operations instruction processing cir...

Method and apparatus for generating return address predictions for...

Predecode repair cache for instructions that cross an instruction c...

Methods and apparatus for managing page crossing instructions with...

Link stack repair of erroneous speculative update

Link stack repair of erroneous speculative update

Debug circuit comparing processor instruction set operating mode

Apparatus and methods for speculative interrupt vector prefetching

Selective powering of a BHT in a processor having variable length i...

Preloading instructions from an instruction set other than a curren...

Methods and system for resolving simultaneous predicted branch inst...

System and method for using a working global history register

Link stack repair of erroneous speculative update

Pre-decoding variable length instructions

Patents Applicationslast 30 patents

OPERAND-BASED REACH EXPLICIT DATAFLOW PROCESSORS, AND RELATED METHO...

METHOD, APPARATUS, AND SYSTEM FOR MEMORY BANDWIDTH AWARE DATA PREFE...

METHOD, APPARATUS, AND SYSTEM FOR REDUCING PIPELINE STALLS DUE TO A...

METHOD, APPARATUS, AND SYSTEM FOR PREFETCHING EXCLUSIVE CACHE COHER...

COMBINING LOAD OR STORE INSTRUCTIONS

PRECISE INVALIDATION OF VIRTUALLY TAGGED CACHES

AGGREGATING CACHE MAINTENANCE INSTRUCTIONS IN PROCESSOR-BASED DEVICES

PRECISE INVALIDATION OF VIRTUALLY TAGGED CACHES

DEPENDENCY-PREDICTION OF INSTRUCTIONS

CACHE MEMORY ERROR DETECTION CIRCUITS FOR DETECTING BIT FLIPS IN VA...

ELIMINATING REDUNDANT SYNCHRONIZATION BARRIERS IN INSTRUCTION PROCE...

OPTIMIZING PERFORMANCE FOR CONTEXT-DEPENDENT INSTRUCTIONS

METHOD AND APPARATUS FOR FORWARDING LITERAL GENERATED DATA TO DEPEN...

METHOD TO IMPROVE SPEED OF EXECUTING RETURN BRANCH INSTRUCTIONS IN...

Fusing Immediate Value, Write-Based Instructions in Instruction Pro...

ESTABLISHING A BRANCH TARGET INSTRUCTION CACHE (BTIC) ENTRY FOR SUB...

METHODS AND APPARATUS FOR MANAGING PAGE CROSSING INSTRUCTIONS WITH...

FUSING FLAG-PRODUCING AND FLAG-CONSUMING INSTRUCTIONS IN INSTRUCTIO...

Qualifying Software Branch-Target Hints with Hardware-Based Predict...

PREVENTING EXECUTION OF PARITY-ERROR-INDUCED UNPREDICTABLE INSTRUCT...

ISSUING INSTRUCTIONS TO EXECUTION PIPELINES BASED ON REGISTER-ASSOC...

FUSING CONDITIONAL WRITE INSTRUCTIONS HAVING OPPOSITE CONDITIONS IN...

Multi Level Indirect Predictor using Confidence Counter and Program...

Method and Apparatus for Tracking Extra Data Permissions in an Inst...

Eliminating Redundant Masking Operations Instruction Processing Cir...

Link Stack Repair of Erroneous Speculative Update

Link Stack Repair of Erroneous Speculative Update

Methods and Apparatus to Predict Non-Execution of Conditional Non-b...

Preloading Instructions from an Instruction Set Other than a Curren...

Effective Use of a BHT in Processor Having Variable Length Instruct...