Brian Worth

Person

Milton, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for single cell product path delay analysis
- Patent number 9,104,834
- Issue date Aug 11, 2015
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying and mitigating electromigration failures in signal nets...
- Patent number 9,104,832
- Issue date Aug 11, 2015
- International Business Machines Corporation
- John E. Barwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for single cell product path delay analysis
- Patent number 8,904,329
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for providing quality control on wafers running o...
- Patent number 7,089,132
- Issue date Aug 8, 2006
- International Business Machines Corporation
- Jeanne P. Bickford
- G01 - MEASURING TESTING
Information Patent Grant
Testable programmable gate array and associated LSSD/deterministic...
- Patent number 6,021,513
- Issue date Feb 1, 2000
- International Business Machines Corporation
- Wayne Kevin Beebe
- G01 - MEASURING TESTING
Information Patent Grant
Testable programmable gate array and associated LSSD/deterministic...
- Patent number 5,867,507
- Issue date Feb 2, 1999
- International Business Machines Corporation
- Wayne Kevin Beebe
- G01 - MEASURING TESTING
Information Patent Grant
Programmable inverter circuit used in a programmable logic cell
- Patent number 5,781,032
- Issue date Jul 14, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell
- Patent number 5,748,009
- Issue date May 5, 1998
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for programming a gate array using a compressed c...
- Patent number 5,745,734
- Issue date Apr 28, 1998
- International Business Machines Corporation
- David John Craft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable array interconnect latch
- Patent number 5,732,246
- Issue date Mar 24, 1998
- International Business Machines Corporation
- Scott Whitney Gould
- G01 - MEASURING TESTING
Information Patent Grant
Low skew multiplexer network and programmable array clock/reset app...
- Patent number 5,717,346
- Issue date Feb 10, 1998
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array clock/reset resource
- Patent number 5,703,498
- Issue date Dec 30, 1997
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory mapping method and apparatus to fold sparsely populated stru...
- Patent number 5,692,147
- Issue date Nov 25, 1997
- International Business Machines Corporation
- Wendell Ray Larsen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array I/O-routing resource
- Patent number 5,671,432
- Issue date Sep 23, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable array clock/reset resource
- Patent number 5,652,529
- Issue date Jul 29, 1997
- International Business Machines Corporation
- Scott Whitney Gould
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic cell having configurable gates and multiplexers
- Patent number 5,646,546
- Issue date Jul 8, 1997
- International Business Machines Corporation
- Allan Robert Bertolet
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
IDENTIFYING AND MITIGATING ELECTROMIGRATION FAILURES IN SIGNAL NETS...
- Publication number 20150205906
- Publication date Jul 23, 2015
- International Buiness Machines Corporation
- John E. Barwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SINGLE CELL PRODUCT PATH DELAY ANALYSIS
- Publication number 20150033199
- Publication date Jan 29, 2015
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR SINGLE CELL PRODUCT PATH DELAY ANALYSIS
- Publication number 20140195995
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR PROVIDING QUALITY CONTROL ON WAFERS RUNNING O...
- Publication number 20050267705
- Publication date Dec 1, 2005
- International Business Machines Corporation
- Jeanne P. Bickford
- G01 - MEASURING TESTING

Brian Worth

Person

Patents Grantslast 30 patents

Systems and methods for single cell product path delay analysis

Identifying and mitigating electromigration failures in signal nets...

Systems and methods for single cell product path delay analysis

Method and system for providing quality control on wafers running o...

Testable programmable gate array and associated LSSD/deterministic...

Testable programmable gate array and associated LSSD/deterministic...

Programmable inverter circuit used in a programmable logic cell

Programmable logic cell

Method and system for programming a gate array using a compressed c...

Programmable array interconnect latch

Low skew multiplexer network and programmable array clock/reset app...

Programmable array clock/reset resource

Memory mapping method and apparatus to fold sparsely populated stru...

Programmable array I/O-routing resource

Programmable array clock/reset resource

Programmable logic cell having configurable gates and multiplexers

Patents Applicationslast 30 patents

IDENTIFYING AND MITIGATING ELECTROMIGRATION FAILURES IN SIGNAL NETS...

SYSTEMS AND METHODS FOR SINGLE CELL PRODUCT PATH DELAY ANALYSIS

SYSTEMS AND METHODS FOR SINGLE CELL PRODUCT PATH DELAY ANALYSIS

METHOD AND SYSTEM FOR PROVIDING QUALITY CONTROL ON WAFERS RUNNING O...