Bryan Darrell Bowyer

Person

Newberg, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Formal verification using microtransactions
- Patent number 10,515,168
- Issue date Dec 24, 2019
- Mentor Graphics Corporation
- Pankaj P. Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Formal verification using microtransactions
- Patent number 9,817,929
- Issue date Nov 14, 2017
- Calypto Design Systems, Inc.
- Pankaj P. Chauhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical presentation techniques for a design tool
- Patent number 8,522,197
- Issue date Aug 27, 2013
- Mentor Graphics Corporation
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonsequential hardware design synthesis verification
- Patent number 8,219,949
- Issue date Jul 10, 2012
- Calypto Design Systems, Inc.
- Robert J. Condon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical presentation techniques for a design tool
- Patent number 7,844,944
- Issue date Nov 30, 2010
- Mentor Graphics Corporation
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interactive interface resource allocation in a behavioral synthesis...
- Patent number 7,831,938
- Issue date Nov 9, 2010
- Mentor Graphics Corporation
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical presentation techniques for a design tool
- Patent number 7,712,050
- Issue date May 4, 2010
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop manipulation in a behavioral synthesis tool
- Patent number 7,412,684
- Issue date Aug 12, 2008
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array transformation in a behavioral synthesis tool
- Patent number 7,310,787
- Issue date Dec 18, 2007
- Shiv Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interactive interface resource allocation in a behavioral synthesis...
- Patent number 7,302,670
- Issue date Nov 27, 2007
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphical loop profile analysis
- Patent number 7,168,059
- Issue date Jan 23, 2007
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical presentation techniques for a design tool
- Patent number 7,120,879
- Issue date Oct 10, 2006
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIERARCHICAL PRESENTATION TECHNIQUES FOR A DESIGN TOOL
- Publication number 20110138348
- Publication date Jun 9, 2011
- Mentor Graphics Corporation
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Nonsequential Hardware Design Synthesis Verification
- Publication number 20110055779
- Publication date Mar 3, 2011
- Robert Condon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array transformation in a behavioral synthesis tool
- Publication number 20080172646
- Publication date Jul 17, 2008
- Shiv Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interactive interface resource allocation in a behavioral synthesis...
- Publication number 20080077906
- Publication date Mar 27, 2008
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical presentation techniques for a design tool
- Publication number 20070006125
- Publication date Jan 4, 2007
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical presentation techniques for a design tool
- Publication number 20070006112
- Publication date Jan 4, 2007
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Loop manipulation in a behavioral synthesis tool
- Publication number 20050268271
- Publication date Dec 1, 2005
- Mentor Graphics Corporation
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interactive interface resource allocation in a behavioral synthesis...
- Publication number 20040111692
- Publication date Jun 10, 2004
- Mentor Graphics Corp.
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Array transformation in a behavioral synthesis tool.
- Publication number 20030172055
- Publication date Sep 11, 2003
- Mentor Graphics Corporation
- Shiv Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical presentation techniques for a design tool
- Publication number 20030033039
- Publication date Feb 13, 2003
- Mentor Graphics Corporation
- Peter Pius Gutberlet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Graphical loop profile analysis
- Publication number 20030005404
- Publication date Jan 2, 2003
- Mentor Graphics
- Bryan Darrell Bowyer
- G06 - COMPUTING CALCULATING COUNTING

Bryan Darrell Bowyer

Person

Patents Grantslast 30 patents

Formal verification using microtransactions

Formal verification using microtransactions

Hierarchical presentation techniques for a design tool

Nonsequential hardware design synthesis verification

Hierarchical presentation techniques for a design tool

Interactive interface resource allocation in a behavioral synthesis...

Hierarchical presentation techniques for a design tool

Loop manipulation in a behavioral synthesis tool

Array transformation in a behavioral synthesis tool

Interactive interface resource allocation in a behavioral synthesis...

Graphical loop profile analysis

Hierarchical presentation techniques for a design tool

Patents Applicationslast 30 patents

HIERARCHICAL PRESENTATION TECHNIQUES FOR A DESIGN TOOL

Nonsequential Hardware Design Synthesis Verification

Array transformation in a behavioral synthesis tool

Interactive interface resource allocation in a behavioral synthesis...

Hierarchical presentation techniques for a design tool

Hierarchical presentation techniques for a design tool

Loop manipulation in a behavioral synthesis tool

Interactive interface resource allocation in a behavioral synthesis...

Array transformation in a behavioral synthesis tool.

Hierarchical presentation techniques for a design tool

Graphical loop profile analysis