Cecile Aulnette

Person

Crolles, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Advanced CPV solar cell assembly process
- Patent number 10,361,326
- Issue date Jul 23, 2019
- Soitec
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple transfer assembly process
- Patent number 9,954,139
- Issue date Apr 24, 2018
- Soitec
- Rainer Krause
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a Ge on III/V-on-insulator structure
- Patent number 9,018,678
- Issue date Apr 28, 2015
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing roughness of a thick insulating layer
- Patent number 8,183,128
- Issue date May 22, 2012
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling by mechanical means of a wafer comprising a multilayer st...
- Patent number 7,602,046
- Issue date Oct 13, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Film taking-off method
- Patent number 7,572,714
- Issue date Aug 11, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor heterostructure
- Patent number 7,544,976
- Issue date Jun 9, 2009
- S.O.I. Tec Silicon on Insulator Technologies
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing a semiconductor heterostructure
- Patent number 7,459,374
- Issue date Dec 2, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing roughness of a thick insulating layer
- Patent number 7,446,019
- Issue date Nov 4, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for concurrently producing at least a pair of semiconductor...
- Patent number 7,407,867
- Issue date Aug 5, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling a wafer comprising a buffer layer, after having separated...
- Patent number 7,378,729
- Issue date May 27, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling by mechanical means of a wafer comprising a multilayer st...
- Patent number 7,375,008
- Issue date May 20, 2008
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling of a wafer comprising a multi-layer structure after takin...
- Patent number 7,256,075
- Issue date Aug 14, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication of a substrate for an epitaxial growth
- Patent number 7,232,488
- Issue date Jun 19, 2007
- S.O.I. Tec Silicon on Insulator Technologies
- Takeshi Akatsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure for providing strained crystalline layer on...
- Patent number 7,232,743
- Issue date Jun 19, 2007
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for concurrently producing at least a pair of semiconductor...
- Patent number 7,115,481
- Issue date Oct 3, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Indirect bonding with disappearance of bonding layer
- Patent number 7,078,353
- Issue date Jul 18, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling of a wafer comprising a buffer layer after having separat...
- Patent number 7,033,905
- Issue date Apr 25, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer of a thin layer from a wafer comprising a buffer layer
- Patent number 7,018,910
- Issue date Mar 28, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recycling a wafer comprising a buffer layer, after having separated...
- Patent number 7,008,857
- Issue date Mar 7, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure for providing strained crystalline layer on...
- Patent number 6,995,427
- Issue date Feb 7, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a semiconductor structure having at least one s...
- Patent number 6,991,995
- Issue date Jan 31, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Cécile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for transferring a thin layer from a wafer having a buffer...
- Patent number 6,991,956
- Issue date Jan 31, 2006
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure and methods for fabricating same
- Patent number 6,955,971
- Issue date Oct 18, 2005
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for adjusting the thickness of a thin layer of...
- Patent number 6,908,774
- Issue date Jun 21, 2005
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
ADVANCED CPV SOLAR CELL ASSEMBLY PROCESS
- Publication number 20160056318
- Publication date Feb 25, 2016
- SOITEC
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE TRANSFER ASSEMBLY PROCESS
- Publication number 20160043254
- Publication date Feb 11, 2016
- SOITEC
- Rainer Krause
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A GE ON III/V-ON-INSULATOR STRUCTURE
- Publication number 20120228672
- Publication date Sep 13, 2012
- SOITEC
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER
- Publication number 20090023267
- Publication date Jan 22, 2009
- S.O.I.Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR HETEROSTRUCTURE
- Publication number 20080142844
- Publication date Jun 19, 2008
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR HETEROSTRUCTURE
- Publication number 20080132031
- Publication date Jun 5, 2008
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Film taking-off method
- Publication number 20070023867
- Publication date Feb 1, 2007
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of reducing roughness of a thick insulating layer
- Publication number 20070020947
- Publication date Jan 25, 2007
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for concurrently producing at least a pair of semiconductor...
- Publication number 20060286770
- Publication date Dec 21, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure for providing strained crystalline layer on...
- Publication number 20060088979
- Publication date Apr 27, 2006
- S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling a wafer comprising a buffer layer, after having separated...
- Publication number 20060076578
- Publication date Apr 13, 2006
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES S.A.
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for transferring a thin layer from a wafer having a buffer...
- Publication number 20050191825
- Publication date Sep 1, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling by mechanical means of a wafer comprising a multilayer st...
- Publication number 20050189323
- Publication date Sep 1, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling of a wafer comprising a multi-layer structure after takin...
- Publication number 20050170611
- Publication date Aug 4, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling of a wafer comprising a multi-layer structure after takin...
- Publication number 20050167002
- Publication date Aug 4, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling by mechanical means of a wafer comprising a multilayer st...
- Publication number 20050150447
- Publication date Jul 14, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Indirect bonding with disappearance of bonding layer
- Publication number 20050070078
- Publication date Mar 31, 2005
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabrication of a substrate for an epitaxial growth
- Publication number 20050066886
- Publication date Mar 31, 2005
- Takeshi Akatsu
- C30 - CRYSTAL GROWTH
Information Patent Application
Semiconductor-on-insulator structure having high-temperature elasti...
- Publication number 20050023610
- Publication date Feb 3, 2005
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for concurrently producing at least a pair of semiconductor...
- Publication number 20040248378
- Publication date Dec 9, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of producing a semiconductor structure having at least one s...
- Publication number 20040248380
- Publication date Dec 9, 2004
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transfer of a thin layer from a wafer comprising a buffer layer
- Publication number 20040157409
- Publication date Aug 12, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for adjusting the thickness of a thin layer of...
- Publication number 20040152311
- Publication date Aug 5, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling a wafer comprising a buffer layer, after having separated...
- Publication number 20040152284
- Publication date Aug 5, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure and methods for fabricating same
- Publication number 20040150067
- Publication date Aug 5, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure for providing strained crystalline layer on...
- Publication number 20040150006
- Publication date Aug 5, 2004
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Recycling of a wafer comprising a buffer layer after having separat...
- Publication number 20040110378
- Publication date Jun 10, 2004
- Bruno Ghyselen
- C30 - CRYSTAL GROWTH
Information Patent Application
Method and apparatus for adjusting the thickness of a layer of semi...
- Publication number 20040087042
- Publication date May 6, 2004
- Bruno Ghyselen
- H01 - BASIC ELECTRIC ELEMENTS

Cecile Aulnette

Person

Patents Grantslast 30 patents

Advanced CPV solar cell assembly process

Multiple transfer assembly process

Method for forming a Ge on III/V-on-insulator structure

Method of reducing roughness of a thick insulating layer

Recycling by mechanical means of a wafer comprising a multilayer st...

Film taking-off method

Semiconductor heterostructure

Method of manufacturing a semiconductor heterostructure

Method of reducing roughness of a thick insulating layer

Method for concurrently producing at least a pair of semiconductor...

Recycling a wafer comprising a buffer layer, after having separated...

Recycling by mechanical means of a wafer comprising a multilayer st...

Recycling of a wafer comprising a multi-layer structure after takin...

Method of fabrication of a substrate for an epitaxial growth

Semiconductor structure for providing strained crystalline layer on...

Method for concurrently producing at least a pair of semiconductor...

Indirect bonding with disappearance of bonding layer

Recycling of a wafer comprising a buffer layer after having separat...

Transfer of a thin layer from a wafer comprising a buffer layer

Recycling a wafer comprising a buffer layer, after having separated...

Semiconductor structure for providing strained crystalline layer on...

Method of producing a semiconductor structure having at least one s...

Methods for transferring a thin layer from a wafer having a buffer...

Semiconductor structure and methods for fabricating same

Method and apparatus for adjusting the thickness of a thin layer of...

Patents Applicationslast 30 patents

ADVANCED CPV SOLAR CELL ASSEMBLY PROCESS

MULTIPLE TRANSFER ASSEMBLY PROCESS

METHOD FOR FORMING A GE ON III/V-ON-INSULATOR STRUCTURE

METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER

SEMICONDUCTOR HETEROSTRUCTURE

METHOD OF MANUFACTURING A SEMICONDUCTOR HETEROSTRUCTURE

Film taking-off method

Method of reducing roughness of a thick insulating layer

Method for concurrently producing at least a pair of semiconductor...

Semiconductor structure for providing strained crystalline layer on...

Recycling a wafer comprising a buffer layer, after having separated...

Methods for transferring a thin layer from a wafer having a buffer...

Recycling by mechanical means of a wafer comprising a multilayer st...

Recycling of a wafer comprising a multi-layer structure after takin...

Recycling of a wafer comprising a multi-layer structure after takin...

Recycling by mechanical means of a wafer comprising a multilayer st...

Indirect bonding with disappearance of bonding layer

Method of fabrication of a substrate for an epitaxial growth

Semiconductor-on-insulator structure having high-temperature elasti...

Method for concurrently producing at least a pair of semiconductor...

Method of producing a semiconductor structure having at least one s...

Transfer of a thin layer from a wafer comprising a buffer layer

Method and apparatus for adjusting the thickness of a thin layer of...

Recycling a wafer comprising a buffer layer, after having separated...

Semiconductor structure and methods for fabricating same

Semiconductor structure for providing strained crystalline layer on...

Recycling of a wafer comprising a buffer layer after having separat...

Method and apparatus for adjusting the thickness of a layer of semi...