Chang Xu

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Stacked architecture for three-dimensional NAND
- Patent number 11,469,214
- Issue date Oct 11, 2022
- Xcelsis Corporation
- Stephen Morein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D NAND—high aspect ratio strings and channels
- Patent number 11,404,439
- Issue date Aug 2, 2022
- Xcelsis Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back biasing of FD-SOI circuit blocks
- Patent number 11,127,738
- Issue date Sep 21, 2021
- Xcelsis Corporation
- Javier A. Delacruz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
3D NAND—high aspect ratio strings and channels
- Patent number 10,784,282
- Issue date Sep 22, 2020
- Xcelsis Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Universal interface for voice activated access to multiple informat...
- Patent number 7,286,990
- Issue date Oct 23, 2007
- Openwave Systems Inc.
- Paul Edmonds
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Server pool for clustered system
- Patent number 6,412,079
- Issue date Jun 25, 2002
- Openwave Systems Inc.
- Paul Edmonds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant bus for clustered system
- Patent number 6,397,345
- Issue date May 28, 2002
- Openwave Systems Inc.
- Paul Edmonds
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared-everything file storage for clustered system
- Patent number 6,230,190
- Issue date May 8, 2001
- Openwave Systems Inc.
- Paul Edmonds
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SCRIBE LANE REINFORCEMENT
- Publication number 20240170411
- Publication date May 23, 2024
- ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
- Xu CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED ARCHITECTURE FOR THREE-DIMENSIONAL NAND
- Publication number 20230050150
- Publication date Feb 16, 2023
- Xcelsis Corporation
- Stephen Morein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS
- Publication number 20220328521
- Publication date Oct 13, 2022
- Xcelsis Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Back Biasing of FD-SOI Circuit Block
- Publication number 20220020741
- Publication date Jan 20, 2022
- Xcelsis Corporation
- Javier A. DELACRUZ
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MANUFACTURING SPLIT-CELL 3D-NAND MEMORY DEVICES
- Publication number 20220005827
- Publication date Jan 6, 2022
- Invensas Corporation
- Xu Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS
- Publication number 20210074723
- Publication date Mar 11, 2021
- Xcelsis Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS
- Publication number 20200203368
- Publication date Jun 25, 2020
- Xcelsis Corporation
- Rajesh Katkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED ARCHITECTURE FOR THREE-DIMENSIONAL NAND
- Publication number 20200203316
- Publication date Jun 25, 2020
- Xcelsis Corporation
- Stephen Morein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Back biasing of FD-SOI circuit blocks
- Publication number 20190252375
- Publication date Aug 15, 2019
- Xcelsis Corporation
- Javier A. DELACRUZ
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Stacked architecture for three-dimensional NAND

3D NAND—high aspect ratio strings and channels

Back biasing of FD-SOI circuit blocks

3D NAND—high aspect ratio strings and channels

Universal interface for voice activated access to multiple informat...

Server pool for clustered system

Fault tolerant bus for clustered system

Shared-everything file storage for clustered system

Patents Applicationslast 30 patents

SCRIBE LANE REINFORCEMENT

STACKED ARCHITECTURE FOR THREE-DIMENSIONAL NAND

3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS

Back Biasing of FD-SOI Circuit Block

TECHNIQUES FOR MANUFACTURING SPLIT-CELL 3D-NAND MEMORY DEVICES

3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS

3D NAND - HIGH ASPECT RATIO STRINGS AND CHANNELS

STACKED ARCHITECTURE FOR THREE-DIMENSIONAL NAND

Back biasing of FD-SOI circuit blocks