Changyok Park

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Buried power rails with self-aligned vias to trench contacts
- Patent number 12,094,822
- Issue date Sep 17, 2024
- Intel Corporation
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoupling capacitors based on dummy through-silicon-vias
- Patent number 11,923,150
- Issue date Mar 5, 2024
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS
- Publication number 20240128023
- Publication date Apr 18, 2024
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE HAVING ANTI-FUSE STRUCTURE
- Publication number 20230207455
- Publication date Jun 29, 2023
- Changyok PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH BURIED POWER RAIL
- Publication number 20230207465
- Publication date Jun 29, 2023
- Intel Corporation
- Andy Chih-Hung WEI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID BONDED CAPACITORS
- Publication number 20230197767
- Publication date Jun 22, 2023
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPACITOR FORMED WITH COUPLED DIES
- Publication number 20220415572
- Publication date Dec 29, 2022
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED POWER RAIL WITH A SILICIDE LAYER FOR WELL BIASING
- Publication number 20220416017
- Publication date Dec 29, 2022
- Intel Corporation
- Changyok PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIA PLATES
- Publication number 20220254872
- Publication date Aug 11, 2022
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR ARRANGEMENTS WITH STACKED TRENCH CONTACTS AND GATE STRAPS
- Publication number 20220190129
- Publication date Jun 16, 2022
- Intel Corporation
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED POWER RAILS WITH SELF-ALIGNED VIAS TO TRENCH CONTACTS
- Publication number 20220157722
- Publication date May 19, 2022
- Intel Corporation
- Guillaume Bouche
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS
- Publication number 20210375551
- Publication date Dec 2, 2021
- Intel Corporation
- Changyok Park
- H01 - BASIC ELECTRIC ELEMENTS

Changyok Park

Person

Patents Grantslast 30 patents

Buried power rails with self-aligned vias to trench contacts

Decoupling capacitors based on dummy through-silicon-vias

Patents Applicationslast 30 patents

DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS

INTEGRATED CIRCUIT STRUCTURE HAVING ANTI-FUSE STRUCTURE

INTEGRATED CIRCUIT STRUCTURE WITH BURIED POWER RAIL

HYBRID BONDED CAPACITORS

CAPACITOR FORMED WITH COUPLED DIES

BURIED POWER RAIL WITH A SILICIDE LAYER FOR WELL BIASING

DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIA PLATES

TRANSISTOR ARRANGEMENTS WITH STACKED TRENCH CONTACTS AND GATE STRAPS

BURIED POWER RAILS WITH SELF-ALIGNED VIAS TO TRENCH CONTACTS

DECOUPLING CAPACITORS BASED ON DUMMY THROUGH-SILICON-VIAS