Chaochieh Tsai

Person

Taichung, TW

People

Patents Grantslast 30 patents

Information Patent Grant
RF seal ring structure
- Patent number 6,943,063
- Issue date Sep 13, 2005
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned process for a stacked gate RF MOSFET device
- Patent number 6,737,310
- Issue date May 18, 2004
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lossless microstrip line in CMOS process
- Patent number 6,664,635
- Issue date Dec 16, 2003
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure to reduce the degradation of the Q value of an inductor c...
- Patent number 6,636,139
- Issue date Oct 21, 2003
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lossless microstrip line in CMOS process
- Patent number 6,495,446
- Issue date Dec 17, 2002
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned process for a stacked gate RF MOSFET device
- Patent number 6,465,294
- Issue date Oct 15, 2002
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lossless co-planar wave guide in CMOS process
- Patent number 6,465,367
- Issue date Oct 15, 2002
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High Q inductor with Cu damascene via/trench etching simultaneous m...
- Patent number 6,444,517
- Issue date Sep 3, 2002
- Taiwan Semiconductor Manufacturing Company
- Heng-Ming Hsu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce a reverse narrow channel effect for MOSFET devices
- Patent number 6,245,639
- Issue date Jun 12, 2001
- Taiwan Semiconductor Manufacturing Company
- ChaoChieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of making CMOS device structure having an anti-SCE block im...
- Patent number 6,232,164
- Issue date May 15, 2001
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure for testing vias interconnecting layers of...
- Patent number 6,175,125
- Issue date Jan 16, 2001
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacturing a single asymmetric pocket implant
- Patent number 6,171,913
- Issue date Jan 9, 2001
- Taiwan Semiconductor Manufacturing Company
- Jau-Jey Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ti-rich TiN insertion layer for suppression of bridging during a sa...
- Patent number 6,121,139
- Issue date Sep 19, 2000
- Taiwan Semiconductor Manufacturing Company
- Shou-Zen Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon and arsenic double implanted pre-amorphization process for...
- Patent number 6,037,204
- Issue date Mar 14, 2000
- Taiwan Semiconductor Manufacturing Company
- Shou-Zen Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Germanium and arsenic double implanted pre-amorphization process fo...
- Patent number 6,030,863
- Issue date Feb 29, 2000
- Taiwan Semiconductor Manufacturing Company
- Shou-Zen Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High effective area capacitor for high density DRAM circuits using...
- Patent number 6,022,775
- Issue date Feb 8, 2000
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
LOCOS field oxide and field oxide process using silicon nitride spa...
- Patent number 5,895,257
- Issue date Apr 20, 1999
- Taiwan Semiconductor Manfacturing Company, Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce field oxide loss from etches
- Patent number 5,821,153
- Issue date Oct 13, 1998
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS device structure with reduced risk of salicide bridging and re...
- Patent number 5,757,045
- Issue date May 26, 1998
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating MOSFET devices
- Patent number 5,702,972
- Issue date Dec 30, 1997
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS device structure and integration method
- Patent number 5,691,212
- Issue date Nov 25, 1997
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation trench with a rounded top edge using an etch buffer layer
- Patent number 5,674,775
- Issue date Oct 7, 1997
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Hsiung Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS device structure with reduced risk of salicide bridging and re...
- Patent number 5,668,024
- Issue date Sep 16, 1997
- Taiwan Semiconductor Manufacturing Company
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
RF seal ring structure
- Publication number 20040217477
- Publication date Nov 4, 2004
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Lossless microstrip line in CMOS process
- Publication number 20030071360
- Publication date Apr 17, 2003
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned process for a stacked gate RF MOSFET device
- Publication number 20030008450
- Publication date Jan 9, 2003
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS

Chaochieh Tsai

Person

Patents Grantslast 30 patents

RF seal ring structure

Self-aligned process for a stacked gate RF MOSFET device

Lossless microstrip line in CMOS process

Structure to reduce the degradation of the Q value of an inductor c...

Lossless microstrip line in CMOS process

Self-aligned process for a stacked gate RF MOSFET device

Lossless co-planar wave guide in CMOS process

High Q inductor with Cu damascene via/trench etching simultaneous m...

Method to reduce a reverse narrow channel effect for MOSFET devices

Process of making CMOS device structure having an anti-SCE block im...

Semiconductor structure for testing vias interconnecting layers of...

Process for manufacturing a single asymmetric pocket implant

Ti-rich TiN insertion layer for suppression of bridging during a sa...

Silicon and arsenic double implanted pre-amorphization process for...

Germanium and arsenic double implanted pre-amorphization process fo...

High effective area capacitor for high density DRAM circuits using...

LOCOS field oxide and field oxide process using silicon nitride spa...

Method to reduce field oxide loss from etches

CMOS device structure with reduced risk of salicide bridging and re...

Method of fabricating MOSFET devices

MOS device structure and integration method

Isolation trench with a rounded top edge using an etch buffer layer

CMOS device structure with reduced risk of salicide bridging and re...

Patents Applicationslast 30 patents

RF seal ring structure

Lossless microstrip line in CMOS process

Self-aligned process for a stacked gate RF MOSFET device