Charles L. Fuoco

Person

Allen, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and mechanism to bypass PCIE address translation by using...
- Patent number 12,056,073
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit device with multiple direct memory access (DMA)...
- Patent number 11,907,145
- Issue date Feb 20, 2024
- Texas Instruments Incorporated
- Brian Jason Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of fault detection circuit
- Patent number 11,823,759
- Issue date Nov 21, 2023
- Texas Instruments Incorporated
- Charles Lance Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time input/output address translation for virtualized systems
- Patent number 11,693,787
- Issue date Jul 4, 2023
- Texas Instruments Incorporated
- Sriramakrishnan Govindarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Safe, secure, virtualized, domain specific hardware accelerator
- Patent number 11,656,925
- Issue date May 23, 2023
- Texas Instruments Incorporated
- Kedar Satish Chitnis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset isolation for an embedded safety island in a system on a chip
- Patent number 11,509,302
- Issue date Nov 22, 2022
- Texas Instruments Incorporated
- Chunhua Hu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Split direct memory access (DMA) with streaming interconnect
- Patent number 11,481,345
- Issue date Oct 25, 2022
- Texas Instruments Incorporated
- Brian Jason Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and mechanism to bypass PCIe address translation by using...
- Patent number 11,449,444
- Issue date Sep 20, 2022
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible hybrid firewall architecture
- Patent number 11,212,256
- Issue date Dec 28, 2021
- Texas Instruments Incorporated
- Amritpal Singh Mundra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Testing of fault detection circuit
- Patent number 11,094,392
- Issue date Aug 17, 2021
- Texas Instruments Incorporated
- Charles Lance Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time input/output address translation for virtualized systems
- Patent number 10,949,357
- Issue date Mar 16, 2021
- Texas Instruments Incorporated
- Sriramakrishnan Govindarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Safe, secure, virtualized, domain specific hardware accelerator
- Patent number 10,929,209
- Issue date Feb 23, 2021
- Texas Instruments Incorporated
- Kedar Satish Chitnis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split direct memory access (DMA)
- Patent number 10,838,896
- Issue date Nov 17, 2020
- Texas Instruments Incorporated
- Brian Jason Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset isolation for an embedded safety island in a system on a chip
- Patent number 10,819,334
- Issue date Oct 27, 2020
- Texas Instruments Incorporated
- Chunhua Hu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flexible hybrid firewall architecture
- Patent number 10,560,428
- Issue date Feb 11, 2020
- Texas Instruments Incorporated
- Amritpal Singh Mundra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and mechanism to bypass PCIe address translation by using...
- Patent number 10,402,355
- Issue date Sep 3, 2019
- Texas Instruments Incorporated
- Brian Karguth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset isolation for an embedded safety island in a system on a chip
- Patent number 10,228,736
- Issue date Mar 12, 2019
- Texas Instruments Incorporated
- Chunhua Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for infrastructure messaging
- Patent number 9,015,376
- Issue date Apr 21, 2015
- Texas Instruments Incorporated
- Michael A. Denio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system of debugging multicore bus transaction problems
- Patent number 8,706,937
- Issue date Apr 22, 2014
- Texas Instruments Incorporated
- Brian Cruickshank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transfer request bus node for transfer controller with hub and ports
- Patent number 7,047,284
- Issue date May 16, 2006
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Active ports in a transfer controller with hub and ports
- Patent number 6,985,982
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write allocation counter for transfer controller with hub and ports
- Patent number 6,954,468
- Issue date Oct 11, 2005
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Request queue manager in transfer controller with hub and ports
- Patent number 6,868,087
- Issue date Mar 15, 2005
- Texas Instruments Incorporated
- Sanjive Agarwala
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Configuration bus reconfigurable/reprogrammable interface for expan...
- Patent number 6,694,385
- Issue date Feb 17, 2004
- Texas Instruments Incorporated
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmer initiated cache block operations
- Patent number 6,665,767
- Issue date Dec 16, 2003
- Texas Instruments Incorporated
- David A. Comisky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified memory system architecture including cache and directly add...
- Patent number 6,606,686
- Issue date Aug 12, 2003
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hub interface unit and application unit interfaces for expanded dir...
- Patent number 6,594,713
- Issue date Jul 15, 2003
- Texas Instruments Incorporated
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for operating one or more caches in conjunctio...
- Patent number 6,594,711
- Issue date Jul 15, 2003
- Texas Instruments Incorporated
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multilevel cache system coherence with memory selectively configure...
- Patent number 6,535,958
- Issue date Mar 18, 2003
- Texas Instruments Incorporated
- Charles L. Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified multilevel memory system architecture which supports both c...
- Patent number 6,484,237
- Issue date Nov 19, 2002
- Texas Instruments Incorporated
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...
- Publication number 20240394206
- Publication date Nov 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT DEVICE WITH MULTIPLE PARALLEL DATA PATHS
- Publication number 20240193112
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Brian Jason KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS
- Publication number 20230350811
- Publication date Nov 2, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Sriramakrishnan GOVINDARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR
- Publication number 20230244557
- Publication date Aug 3, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kedar Satish CHITNIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT DIRECT MEMORY ACCESS (DMA)
- Publication number 20230042413
- Publication date Feb 9, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Brian Jason KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...
- Publication number 20230018225
- Publication date Jan 19, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING OF FAULT DETECTION CIRCUIT
- Publication number 20210375383
- Publication date Dec 2, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Charles Lance FUOCO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS
- Publication number 20210165744
- Publication date Jun 3, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Sriramakrishnan GOVINDARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR
- Publication number 20210117254
- Publication date Apr 22, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Kedar Satish CHITNIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT DIRECT MEMORY ACCESS (DMA)
- Publication number 20210073150
- Publication date Mar 11, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Brian Jason KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP
- Publication number 20210044292
- Publication date Feb 11, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Chunhua Hu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLEXIBLE HYBRID FIREWALL ARCHITECTURE
- Publication number 20200304464
- Publication date Sep 24, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Amritpal Singh Mundra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS
- Publication number 20200242048
- Publication date Jul 30, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Sriramakrishnan GOVINDARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR
- Publication number 20200210256
- Publication date Jul 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Kedar Satish CHITNIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING OF FAULT DETECTION CIRCUIT
- Publication number 20200118642
- Publication date Apr 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Charles Lance FUOCO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPLIT DIRECT MEMORY ACCESS (DMA)
- Publication number 20200117626
- Publication date Apr 16, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Brian Jason KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Mechanism to Bypass PCIe Address Translation By Using...
- Publication number 20190391941
- Publication date Dec 26, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP
- Publication number 20190212794
- Publication date Jul 11, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Chunhua Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE HYBRID FIREWALL ARCHITECTURE
- Publication number 20190058691
- Publication date Feb 21, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Amritpal Singh Mundra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and Mechanism to Bypass PCIe Address Translation By Using...
- Publication number 20180225238
- Publication date Aug 9, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Brian KARGUTH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP
- Publication number 20180189156
- Publication date Jul 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Chunhua Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Infrastructure Messaging
- Publication number 20130290984
- Publication date Oct 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Michael A. Denio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Deadlock Avoidance in a Multi-Node System
- Publication number 20130054852
- Publication date Feb 28, 2013
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Monitoring and Debugging Access to a Bus Slav...
- Publication number 20120226839
- Publication date Sep 6, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Charles Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System of debugging Multicore Bus Transaction Problems
- Publication number 20120226837
- Publication date Sep 6, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Brian Cruickshank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Active ports in a transfer controller with hub and ports
- Publication number 20020078269
- Publication date Jun 20, 2002
- Sanjive Agarwala
- G06 - COMPUTING CALCULATING COUNTING

Charles L. Fuoco

Person

Patents Grantslast 30 patents

Apparatus and mechanism to bypass PCIE address translation by using...

Integrated circuit device with multiple direct memory access (DMA)...

Testing of fault detection circuit

Real time input/output address translation for virtualized systems

Safe, secure, virtualized, domain specific hardware accelerator

Reset isolation for an embedded safety island in a system on a chip

Split direct memory access (DMA) with streaming interconnect

Apparatus and mechanism to bypass PCIe address translation by using...

Flexible hybrid firewall architecture

Testing of fault detection circuit

Real time input/output address translation for virtualized systems

Safe, secure, virtualized, domain specific hardware accelerator

Split direct memory access (DMA)

Reset isolation for an embedded safety island in a system on a chip

Flexible hybrid firewall architecture

Apparatus and mechanism to bypass PCIe address translation by using...

Reset isolation for an embedded safety island in a system on a chip

Method for infrastructure messaging

Method and system of debugging multicore bus transaction problems

Transfer request bus node for transfer controller with hub and ports

Active ports in a transfer controller with hub and ports

Write allocation counter for transfer controller with hub and ports

Request queue manager in transfer controller with hub and ports

Configuration bus reconfigurable/reprogrammable interface for expan...

Programmer initiated cache block operations

Unified memory system architecture including cache and directly add...

Hub interface unit and application unit interfaces for expanded dir...

Method and apparatus for operating one or more caches in conjunctio...

Multilevel cache system coherence with memory selectively configure...

Unified multilevel memory system architecture which supports both c...

Patents Applicationslast 30 patents

APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...

CIRCUIT DEVICE WITH MULTIPLE PARALLEL DATA PATHS

REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS

SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR

SPLIT DIRECT MEMORY ACCESS (DMA)

APPARATUS AND MECHANISM TO BYPASS PCIE ADDRESS TRANSLATION BY USING...

TESTING OF FAULT DETECTION CIRCUIT

REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS

SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR

SPLIT DIRECT MEMORY ACCESS (DMA)

RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP

FLEXIBLE HYBRID FIREWALL ARCHITECTURE

REAL TIME INPUT/OUTPUT ADDRESS TRANSLATION FOR VIRTUALIZED SYSTEMS

SAFE, SECURE, VIRTUALIZED, DOMAIN SPECIFIC HARDWARE ACCELERATOR

TESTING OF FAULT DETECTION CIRCUIT

SPLIT DIRECT MEMORY ACCESS (DMA)

Apparatus and Mechanism to Bypass PCIe Address Translation By Using...

RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP

FLEXIBLE HYBRID FIREWALL ARCHITECTURE

Apparatus and Mechanism to Bypass PCIe Address Translation By Using...

RESET ISOLATION FOR AN EMBEDDED SAFETY ISLAND IN A SYSTEM ON A CHIP

Method for Infrastructure Messaging

Deadlock Avoidance in a Multi-Node System

Method and System for Monitoring and Debugging Access to a Bus Slav...

Method and System of debugging Multicore Bus Transaction Problems

Active ports in a transfer controller with hub and ports