Charles S. Chiu

Person

Essex Junction, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for modeling I/O simultaneous switching noise
- Patent number 8,510,697
- Issue date Aug 13, 2013
- International Business Machines Corporation
- Erik Breiland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early decoupling capacitor optimization method for hierarchical cir...
- Patent number 8,438,520
- Issue date May 7, 2013
- International Business Machines Corporation
- Kurt A. Carlsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-segments modeling bond wire interconnects with 2D simulations...
- Patent number 8,312,404
- Issue date Nov 13, 2012
- International Business Machines Corporation
- Haitian Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for modeling I/O simultaneous switching noise
- Patent number 8,234,611
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Erik Breiland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus and computer program product for electrical packa...
- Patent number 7,809,543
- Issue date Oct 5, 2010
- International Business Machines Corporation
- Charles Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical method of power supply noise and signal integrity anal...
- Patent number 7,197,446
- Issue date Mar 27, 2007
- International Business Machines Corporation
- Erik Breiland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and package modeling
- Patent number 7,110,930
- Issue date Sep 19, 2006
- International Business Machines Corporation
- Charles S. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method to reduce signal cross-talk
- Patent number 7,038,319
- Issue date May 2, 2006
- International Business Machines Corporation
- Patrick H. Buffet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient and comprehensive method to calculate IC package or PCB t...
- Patent number 7,000,203
- Issue date Feb 14, 2006
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for enhancing a power bus in I/O regions of an ASIC device
- Patent number 6,598,216
- Issue date Jul 22, 2003
- International Business Machines Corporation
- Francis Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of designing a voltage partitioned solder-bump package
- Patent number 6,584,596
- Issue date Jun 24, 2003
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast method of I/O circuit placement and electrical rule checking
- Patent number 6,584,606
- Issue date Jun 24, 2003
- International Business Machines Corporation
- Charles S. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of designing a voltage partitioned wirebond package
- Patent number 6,523,150
- Issue date Feb 18, 2003
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
EARLY DECOUPLING CAPACITOR OPTIMIZATION METHOD FOR HIERARCHICAL CIR...
- Publication number 20130054202
- Publication date Feb 28, 2013
- International Business Machines Corporation
- Kurt A. Carlsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE
- Publication number 20120204137
- Publication date Aug 9, 2012
- International Business Machines Corporation
- Erik BREILAND
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of Multi-segments Modeling Bond Wire Interconnects with 2D S...
- Publication number 20100332193
- Publication date Dec 30, 2010
- International Business Machines Corporation
- Haitian Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE
- Publication number 20100005435
- Publication date Jan 7, 2010
- Erik Breiland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR RAPID RETURN PATH TRACING
- Publication number 20090094564
- Publication date Apr 9, 2009
- Timothy W. Budell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus And Computer Program Product For Electrical Packa...
- Publication number 20080168409
- Publication date Jul 10, 2008
- Charles Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL METHOD OF POWER SUPPLY NOISE AND SIGNAL INTEGRITY ANAL...
- Publication number 20060047490
- Publication date Mar 2, 2006
- International Business Machines Corporation
- Erik Breiland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT AND COMPREHENSIVE METHOD TO CALCULATE IC PACKAGE OR PCB T...
- Publication number 20050102641
- Publication date May 12, 2005
- International Business Machines Corporation
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method to reduce signal cross-talk
- Publication number 20050040536
- Publication date Feb 24, 2005
- International Business Machines Corporation
- Patrick H. Buffet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit and package modeling
- Publication number 20040098238
- Publication date May 20, 2004
- International Business Machines Corporation
- Charles S. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DESIGNING A VOLTAGE PARTITIONED SOLDER-BUMP PACKAGE
- Publication number 20030061571
- Publication date Mar 27, 2003
- Patrick H. Buffet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for enhancing a power bus in I/O regions of an ASIC device
- Publication number 20030033578
- Publication date Feb 13, 2003
- International Business Machines Corporation
- Francis Chan
- G06 - COMPUTING CALCULATING COUNTING

Charles S. Chiu

Person

Patents Grantslast 30 patents

System and method for modeling I/O simultaneous switching noise

Early decoupling capacitor optimization method for hierarchical cir...

Multi-segments modeling bond wire interconnects with 2D simulations...

System and method for modeling I/O simultaneous switching noise

Method, apparatus and computer program product for electrical packa...

Hierarchical method of power supply noise and signal integrity anal...

Integrated circuit and package modeling

Apparatus and method to reduce signal cross-talk

Efficient and comprehensive method to calculate IC package or PCB t...

Method for enhancing a power bus in I/O regions of an ASIC device

Method of designing a voltage partitioned solder-bump package

Fast method of I/O circuit placement and electrical rule checking

Method of designing a voltage partitioned wirebond package

Patents Applicationslast 30 patents

EARLY DECOUPLING CAPACITOR OPTIMIZATION METHOD FOR HIERARCHICAL CIR...

SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE

Method of Multi-segments Modeling Bond Wire Interconnects with 2D S...

SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE

METHOD FOR RAPID RETURN PATH TRACING

Method, Apparatus And Computer Program Product For Electrical Packa...

HIERARCHICAL METHOD OF POWER SUPPLY NOISE AND SIGNAL INTEGRITY ANAL...

EFFICIENT AND COMPREHENSIVE METHOD TO CALCULATE IC PACKAGE OR PCB T...

Apparatus and method to reduce signal cross-talk

Integrated circuit and package modeling

METHOD OF DESIGNING A VOLTAGE PARTITIONED SOLDER-BUMP PACKAGE

Method for enhancing a power bus in I/O regions of an ASIC device