Chih-Hsin Wang

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-level memory cell read, program, and erase techniques
- Patent number 8,792,274
- Issue date Jul 29, 2014
- Marvell International Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Positive and negative voltage level shifter circuit
- Patent number 8,270,234
- Issue date Sep 18, 2012
- Marvell International Ltd
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
High-voltage LDMOSFET and applications therefor in standard CMOS
- Patent number 8,264,039
- Issue date Sep 11, 2012
- Synopsys, Inc.
- Bin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and methods for multi-level nonvolatile memory read, program...
- Patent number 8,248,848
- Issue date Aug 21, 2012
- Marvell International Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell and array
- Patent number 8,120,088
- Issue date Feb 21, 2012
- Marvell International Ltd.
- Min She
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with communication element
- Patent number 8,113,436
- Issue date Feb 14, 2012
- RFMarq, Inc.
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Array architecture including mirrored segments for nonvolatile memo...
- Patent number 8,116,110
- Issue date Feb 14, 2012
- Marvell International Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Isolation for non-volatile memory cell array
- Patent number 8,072,023
- Issue date Dec 6, 2011
- Marvell International Ltd.
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Positive and negative voltage level shifter circuit
- Patent number 7,948,810
- Issue date May 24, 2011
- Marvell International Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell array and logic
- Patent number 7,847,374
- Issue date Dec 7, 2010
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for semiconductor device and semiconductor mem...
- Patent number 7,824,981
- Issue date Nov 2, 2010
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
System for tracking elements using tags
- Patent number 7,784,688
- Issue date Aug 31, 2010
- RFMarq, Inc.
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrically alterable memory cell
- Patent number 7,759,719
- Issue date Jul 20, 2010
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Program-and-erase method for multilevel nonvolatile memory
- Patent number 7,746,704
- Issue date Jun 29, 2010
- Marvell International Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods of forming semiconductor devices
- Patent number 7,745,286
- Issue date Jun 29, 2010
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus transporting charges in semiconductor device a...
- Patent number 7,741,177
- Issue date Jun 22, 2010
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Auto-zero current sensing amplifier
- Patent number 7,724,596
- Issue date May 25, 2010
- Marvell World Trade Ltd.
- Pantas Sutardja
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power electrically alterable nonvolatile memory cells and arrays
- Patent number 7,719,050
- Issue date May 18, 2010
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Secure system for tracking elements using tags
- Patent number 7,665,661
- Issue date Feb 23, 2010
- R828 LLC
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrically alterable non-volatile memory cells and arrays
- Patent number 7,626,864
- Issue date Dec 1, 2009
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for operating semiconductor device and semiconductor memory...
- Patent number 7,613,041
- Issue date Nov 3, 2009
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor structure with RF element
- Patent number 7,607,586
- Issue date Oct 27, 2009
- R828 LLC
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RF tags affixed in manufactured elements
- Patent number 7,595,728
- Issue date Sep 29, 2009
- R828 LLC
- Chih-Hsin Wang
- G08 - SIGNALLING
Information Patent Grant
Method and apparatus transporting charges in semiconductor device a...
- Patent number 7,550,800
- Issue date Jun 23, 2009
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power electrically alterable nonvolatile memory cells and arrays
- Patent number 7,547,601
- Issue date Jun 16, 2009
- Marvell World Trade Ltd.
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power electrically alterable nonvolatile memory cells and arrays
- Patent number 7,411,244
- Issue date Aug 12, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage FET gate structure
- Patent number 7,375,398
- Issue date May 20, 2008
- Impinj, Inc.
- Bin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of operating electrically alterable non-volatile memory cell
- Patent number 7,372,734
- Issue date May 13, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for semiconductor device and semiconductor mem...
- Patent number 7,297,634
- Issue date Nov 20, 2007
- Marvell World Trade Ltd.
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Inverter non-volatile memory cell and array system
- Patent number 7,257,033
- Issue date Aug 14, 2007
- Impinj, Inc.
- Bin Wang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR INSPECTION BY DEFLECTOR CONTROL IN A CHARGED...
- Publication number 20240153732
- Publication date May 9, 2024
- ASML NETHERLANDS B.V.
- Datong ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor structure with communication element
- Publication number 20100038763
- Publication date Feb 18, 2010
- R828 LLC
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALIGNMENT PROTECTION IN NON-VOLATILE MEMORY AND ARRAY
- Publication number 20080237696
- Publication date Oct 2, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY AND ARRAY
- Publication number 20080203464
- Publication date Aug 28, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for semiconductor device and semiconductor mem...
- Publication number 20080070390
- Publication date Mar 20, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Low power electrically alterable nonvolatile memory cells and arrays
- Publication number 20080061321
- Publication date Mar 13, 2008
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus transporting charges in semiconductor device a...
- Publication number 20070281425
- Publication date Dec 6, 2007
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus transporting charges in semiconductor device a...
- Publication number 20070281426
- Publication date Dec 6, 2007
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
INVERTER NON-VOLATILE MEMORY CELL AND ARRAY SYSTEM
- Publication number 20070263456
- Publication date Nov 15, 2007
- Impinj, Inc.
- Bin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY CELLS AND ARRAYS
- Publication number 20070253257
- Publication date Nov 1, 2007
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR OPERATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY...
- Publication number 20070008778
- Publication date Jan 11, 2007
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
RF tags affixed in manufactured elements
- Publication number 20060290504
- Publication date Dec 28, 2006
- Chih-Hsin Wang
- G08 - SIGNALLING
Information Patent Application
Low power electrically alterable nonvolatile memory cells and arrays
- Publication number 20060289924
- Publication date Dec 28, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of operating electrically alterable non-volatile memory cell
- Publication number 20060240613
- Publication date Oct 26, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
System for tracking elements using tags
- Publication number 20060213988
- Publication date Sep 28, 2006
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secure system for tracking elements using tags
- Publication number 20060214794
- Publication date Sep 28, 2006
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor structure with RF element
- Publication number 20060214798
- Publication date Sep 28, 2006
- Chih-Hsin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inverter non-volatile memory cell and array system
- Publication number 20060209598
- Publication date Sep 21, 2006
- Impinj, Inc.
- Bin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Electrically alterable non-volatile memory cell
- Publication number 20060035424
- Publication date Feb 16, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
P-channel electrically alterable non-volatile memory cell
- Publication number 20060033146
- Publication date Feb 16, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for nonvolatile memory
- Publication number 20060017091
- Publication date Jan 26, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Electrically alterable memory cell
- Publication number 20060006454
- Publication date Jan 12, 2006
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High voltage FET gate structure
- Publication number 20060001050
- Publication date Jan 5, 2006
- Impinj, Inc.
- Bin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus transporting charges in semiconductor device a...
- Publication number 20060001053
- Publication date Jan 5, 2006
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
High-voltage LDMOSFET and applications therefor in standard CMOS
- Publication number 20050258461
- Publication date Nov 24, 2005
- Impinj, Inc., a Delaware Corporation
- Bin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and apparatus for semiconductor device and semiconductor mem...
- Publication number 20050201150
- Publication date Sep 15, 2005
- Chih-Hsin Wang
- G11 - INFORMATION STORAGE
Information Patent Application
Method of forming floating-gate memory cell having trench structure...
- Publication number 20050169041
- Publication date Aug 4, 2005
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLOATING-GATE MEMORY CELL HAVING TRENCH STRUCTURE WITH BALLASTIC-CH...
- Publication number 20040248371
- Publication date Dec 9, 2004
- Chih-Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self aligned method of forming a semiconductor memory array of floa...
- Publication number 20040214396
- Publication date Oct 28, 2004
- Chih Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of operating a semiconductor memory array of floating gate m...
- Publication number 20040212009
- Publication date Oct 28, 2004
- Chih Hsin Wang
- H01 - BASIC ELECTRIC ELEMENTS

Chih-Hsin Wang

Person

Patents Grantslast 30 patents

Multi-level memory cell read, program, and erase techniques

Positive and negative voltage level shifter circuit

High-voltage LDMOSFET and applications therefor in standard CMOS

System and methods for multi-level nonvolatile memory read, program...

Non-volatile memory cell and array

Semiconductor structure with communication element

Array architecture including mirrored segments for nonvolatile memo...

Isolation for non-volatile memory cell array

Positive and negative voltage level shifter circuit

Non-volatile memory cell array and logic

Method and apparatus for semiconductor device and semiconductor mem...

System for tracking elements using tags

Electrically alterable memory cell

Program-and-erase method for multilevel nonvolatile memory

Methods of forming semiconductor devices

Method and apparatus transporting charges in semiconductor device a...

Auto-zero current sensing amplifier

Low power electrically alterable nonvolatile memory cells and arrays

Secure system for tracking elements using tags

Electrically alterable non-volatile memory cells and arrays

Methods for operating semiconductor device and semiconductor memory...

Semiconductor structure with RF element

RF tags affixed in manufactured elements

Method and apparatus transporting charges in semiconductor device a...

Low power electrically alterable nonvolatile memory cells and arrays

Low power electrically alterable nonvolatile memory cells and arrays

High voltage FET gate structure

Methods of operating electrically alterable non-volatile memory cell

Method and apparatus for semiconductor device and semiconductor mem...

Inverter non-volatile memory cell and array system

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR INSPECTION BY DEFLECTOR CONTROL IN A CHARGED...

Semiconductor structure with communication element

ALIGNMENT PROTECTION IN NON-VOLATILE MEMORY AND ARRAY

ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY AND ARRAY

Method and apparatus for semiconductor device and semiconductor mem...

Low power electrically alterable nonvolatile memory cells and arrays

Method and apparatus transporting charges in semiconductor device a...

Method and apparatus transporting charges in semiconductor device a...

INVERTER NON-VOLATILE MEMORY CELL AND ARRAY SYSTEM

ELECTRICALLY ALTERABLE NON-VOLATILE MEMORY CELLS AND ARRAYS

METHODS FOR OPERATING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MEMORY...

RF tags affixed in manufactured elements

Low power electrically alterable nonvolatile memory cells and arrays

Methods of operating electrically alterable non-volatile memory cell

System for tracking elements using tags

Secure system for tracking elements using tags

Semiconductor structure with RF element

Inverter non-volatile memory cell and array system

Electrically alterable non-volatile memory cell

P-channel electrically alterable non-volatile memory cell

Method and apparatus for nonvolatile memory

Electrically alterable memory cell

High voltage FET gate structure

Method and apparatus transporting charges in semiconductor device a...

High-voltage LDMOSFET and applications therefor in standard CMOS

Method and apparatus for semiconductor device and semiconductor mem...

Method of forming floating-gate memory cell having trench structure...

FLOATING-GATE MEMORY CELL HAVING TRENCH STRUCTURE WITH BALLASTIC-CH...

Self aligned method of forming a semiconductor memory array of floa...

Method of operating a semiconductor memory array of floating gate m...