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Chin-Chi Teng
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Sunnyvale, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method of estimating path delays in an IC
Patent number
7,082,587
Issue date
Jul 25, 2006
Cadence Design Systems, Inc.
Pinhong Chen
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Two-stage clock tree synthesis with buffer distribution balancing
Patent number
7,051,310
Issue date
May 23, 2006
Cadence Design Systems, Inc.
Chung-wen Tsao
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
IC conductor capacitance estimation method
Patent number
6,925,619
Issue date
Aug 2, 2005
Cadence Design Systems, Inc.
Chin-Chi Teng
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock tree synthesis for mixed domain clocks
Patent number
6,782,519
Issue date
Aug 24, 2004
Cadence Design Systems, Inc.
Jui-Ming Chang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock tree synthesizer for balancing reconvergent and crossover clo...
Patent number
6,763,513
Issue date
Jul 13, 2004
Cadence Design Systems, Inc.
Jui-Ming Chang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock tree synthesis for a hierarchically partitioned IC layout
Patent number
6,751,786
Issue date
Jun 15, 2004
Cadence Design Systems, Inc.
Chin-Chi Teng
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method for balancing a clock tree
Patent number
6,351,840
Issue date
Feb 26, 2002
Silicon Perspective Corporation
Chin-Chi Teng
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
IC conductor capacitance estimation method
Publication number
20040237058
Publication date
Nov 25, 2004
Chin-Chi Teng
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Two-stage clock tree synthesis
Publication number
20040225984
Publication date
Nov 11, 2004
Chung-Wen Tsao
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Clock tree synthesis for a hierarchically partitioned IC layout
Publication number
20030208736
Publication date
Nov 6, 2003
Chin-Chi Teng
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Clock tree synthesis for mixed domain clocks
Publication number
20030182634
Publication date
Sep 25, 2003
Jui-Ming Chang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method of estimating path delays in an IC
Publication number
20030140325
Publication date
Jul 24, 2003
Pinhong Chen
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Gated clock tree synthesis
Publication number
20030135836
Publication date
Jul 17, 2003
Jui-Ming Chang
G06 - COMPUTING CALCULATING COUNTING