Chin-Hsiung Ho

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dry clean process to improve device gate oxide integrity (GOI) and...
- Patent number 6,743,715
- Issue date Jun 1, 2004
- Taiwan Semiconductor Manufacturing Company
- Juing-Yi Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for depositing silicon oxide incorporating an outgassing step
- Patent number 6,716,740
- Issue date Apr 6, 2004
- Taiwan Semiconductor Manufacturing Co., Ltd
- Shih-Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrostatic charge-free solvent-type dryer for semiconductor wafers
- Patent number 6,647,998
- Issue date Nov 18, 2003
- Taiwan Semiconductor Manufacturing Co. Ltd
- Jih-Churng Twu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preventing Cu CMP corrosion
- Patent number 6,555,477
- Issue date Apr 29, 2003
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chen-Fa Lu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming n and p wells in a semiconductor substrate using...
- Patent number 6,207,538
- Issue date Mar 27, 2001
- Taiwan Semiconductor Manufacturing Company
- Kuo-Hua Pan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing shallow trench isolation structure
- Patent number 6,103,581
- Issue date Aug 15, 2000
- Taiwan Semiconductor Manufacturing Company
- Chung-Te Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a field effect transistor
- Patent number 6,090,716
- Issue date Jul 18, 2000
- Siliconix Incorporated
- Brian H. Floyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Borderless contact
- Patent number 6,083,824
- Issue date Jul 4, 2000
- Taiwan Semiconductor Manufacturing Company
- Chao-Chieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplified process for the fabrication of deep clear laser marks us...
- Patent number 6,063,695
- Issue date May 16, 2000
- Taiwan Semiconductor Manufacturing Company
- Chung-Te Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation process using chemical-mechanical polish w...
- Patent number 6,057,207
- Issue date May 2, 2000
- Taiwan Semiconductor Manufacturing Company
- Chung-Te Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon and arsenic double implanted pre-amorphization process for...
- Patent number 6,037,204
- Issue date Mar 14, 2000
- Taiwan Semiconductor Manufacturing Company
- Shou-Zen Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene interconnect process with borderless contact
- Patent number 6,020,255
- Issue date Feb 1, 2000
- Taiwan Semiconductor Manufacturing Company
- Chao-Chieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to reduce field oxide loss from etches
- Patent number 5,821,153
- Issue date Oct 13, 1998
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chaochieh Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation trench with a rounded top edge using an etch buffer layer
- Patent number 5,674,775
- Issue date Oct 7, 1997
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-Hsiung Ho
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for depositing silicon oxide incorporating an outgassing step
- Publication number 20030068902
- Publication date Apr 10, 2003
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic charge-free solvent-type dryer for semiconductor wafers
- Publication number 20020195130
- Publication date Dec 26, 2002
- Taiwan Semiconductor Manufactoring Co., Ltd.
- Jih-Churng Twu
- H01 - BASIC ELECTRIC ELEMENTS

Chin-Hsiung Ho

Person

Patents Grantslast 30 patents

Dry clean process to improve device gate oxide integrity (GOI) and...

Method for depositing silicon oxide incorporating an outgassing step

Electrostatic charge-free solvent-type dryer for semiconductor wafers

Method for preventing Cu CMP corrosion

Method for forming n and p wells in a semiconductor substrate using...

Method for producing shallow trench isolation structure

Method of fabricating a field effect transistor

Borderless contact

Simplified process for the fabrication of deep clear laser marks us...

Shallow trench isolation process using chemical-mechanical polish w...

Silicon and arsenic double implanted pre-amorphization process for...

Dual damascene interconnect process with borderless contact

Method to reduce field oxide loss from etches

Isolation trench with a rounded top edge using an etch buffer layer

Patents Applicationslast 30 patents

Method for depositing silicon oxide incorporating an outgassing step

Electrostatic charge-free solvent-type dryer for semiconductor wafers